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authorChris Metcalf <cmetcalf@tilera.com>2013-08-09 15:41:09 -0400
committerChris Metcalf <cmetcalf@tilera.com>2013-08-30 11:56:16 -0400
commit8d8cf0674023da578e0539dc7cf4d824b2cf1f9e (patch)
tree2dd51ebbceaa602fcc9c90d0c45de929d5666804
parentd4d9eab4ade468b6a97b6853fdd72e8f21474324 (diff)
downloadop-kernel-dev-8d8cf0674023da578e0539dc7cf4d824b2cf1f9e.zip
op-kernel-dev-8d8cf0674023da578e0539dc7cf4d824b2cf1f9e.tar.gz
tile: fix panic with large IRQ number
The "available_irqs" value needs to actually reflect the IRQs available, not just start as an all-ones mask, since we only have 32 IRQs available even on a 64-bit platform. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
-rw-r--r--arch/tile/kernel/irq.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/tile/kernel/irq.c b/arch/tile/kernel/irq.c
index c90de6c..0e6c521 100644
--- a/arch/tile/kernel/irq.c
+++ b/arch/tile/kernel/irq.c
@@ -55,7 +55,8 @@ static DEFINE_PER_CPU(int, irq_depth);
/* State for allocating IRQs on Gx. */
#if CHIP_HAS_IPI()
-static unsigned long available_irqs = ~(1UL << IRQ_RESCHEDULE);
+static unsigned long available_irqs = ((1UL << NR_IRQS) - 1) &
+ (~(1UL << IRQ_RESCHEDULE));
static DEFINE_SPINLOCK(available_irqs_lock);
#endif
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