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author | Seungwon Jeon <tgih.jun@samsung.com> | 2012-05-22 13:01:21 +0900 |
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committer | Chris Ball <cjb@laptop.org> | 2012-06-06 09:38:51 -0400 |
commit | e419990b5e811027b1552cbc5b76a6cc180f7f48 (patch) | |
tree | 12791ff201b9e56f74caaa86c22ce0964a8effcc | |
parent | fda5f736864c46324dbc50246ef1ca0e84ebf4ae (diff) | |
download | op-kernel-dev-e419990b5e811027b1552cbc5b76a6cc180f7f48.zip op-kernel-dev-e419990b5e811027b1552cbc5b76a6cc180f7f48.tar.gz |
mmc: dw_mmc: correct the calculation for CLKDIV
In case of "host->bus_hz < slot->clock", divider value is
miscalculated. And clock divider register value is multiple of 2. If
calculated divider value is odd number, result can be over-clocking.
Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com>
Acked-by: Will Newton <will.newton@gmail.com>
Signed-off-by: Chris Ball <cjb@laptop.org>
-rw-r--r-- | drivers/mmc/host/dw_mmc.c | 9 |
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/mmc/host/dw_mmc.c b/drivers/mmc/host/dw_mmc.c index b070ee5..1ca5e72 100644 --- a/drivers/mmc/host/dw_mmc.c +++ b/drivers/mmc/host/dw_mmc.c @@ -617,14 +617,15 @@ static void dw_mci_setup_bus(struct dw_mci_slot *slot) u32 div; if (slot->clock != host->current_speed) { - if (host->bus_hz % slot->clock) + div = host->bus_hz / slot->clock; + if (host->bus_hz % slot->clock && host->bus_hz > slot->clock) /* * move the + 1 after the divide to prevent * over-clocking the card. */ - div = ((host->bus_hz / slot->clock) >> 1) + 1; - else - div = (host->bus_hz / slot->clock) >> 1; + div += 1; + + div = (host->bus_hz != slot->clock) ? DIV_ROUND_UP(div, 2) : 0; dev_info(&slot->mmc->class_dev, "Bus speed (slot %d) = %dHz (slot req %dHz, actual %dHZ" |