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authorChris Wilson <chris@chris-wilson.co.uk>2010-10-22 10:48:12 +0100
committerChris Wilson <chris@chris-wilson.co.uk>2010-10-22 10:48:12 +0100
commit878a3c37d36142a192bdf5b6bfcf920832f431d7 (patch)
tree871fd2a166abcf08e7054a4bc4667b43f714a114
parente27d8538695d1aee69eb4fdd6f98988e6ffc5c33 (diff)
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op-kernel-dev-878a3c37d36142a192bdf5b6bfcf920832f431d7.tar.gz
drm/i915: Fix flushing regression from 9af90d19f
Whilst moving the code around in 9af90d19f, I dropped the or'ing in of new write domains which would zero out the write domain for a render target if later reused as a source later in the batch. This meant that we might drop a required flush before reading from the render target. Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=31043 Reported-by: xunx.fang@intel.com Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
-rw-r--r--drivers/gpu/drm/i915/i915_gem.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index c3398d3..9290f02 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -3349,7 +3349,7 @@ i915_gem_execbuffer_relocate(struct drm_i915_gem_object *obj,
}
target_obj->pending_read_domains |= reloc.read_domains;
- target_obj->pending_write_domain = reloc.write_domain;
+ target_obj->pending_write_domain |= reloc.write_domain;
/* If the relocation already has the right value in it, no
* more work needs to be done.
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