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authorMatthieu CASTET <matthieu.castet@parrot.com>2012-03-19 15:35:25 +0100
committerDavid Woodhouse <David.Woodhouse@intel.com>2012-03-27 01:01:43 +0100
commit637957551c0ac80de8dfc7650d320c5a98c2c0c0 (patch)
treedd883015fceec71c899867bd710448dd66c61e48
parent452380efbd72d8d41f53ea64c8a6ea1fedc4394d (diff)
downloadop-kernel-dev-637957551c0ac80de8dfc7650d320c5a98c2c0c0.zip
op-kernel-dev-637957551c0ac80de8dfc7650d320c5a98c2c0c0.tar.gz
mtd: support ONFI multi lun NAND
With onfi a flash is organized into one or more logical units (LUNs). A logical unit (LUN) is the minimum unit that can independently execute commands and report status. Mtd does not exploit LUN, so make it see a big single flash where size is lun_size * number_of_lun. Without this patch MT29F8G08ADBDAH4 size is 512MiB instead of 1GiB. Artem: split long line on 2 shorter ones. Signed-off-by: Matthieu Castet <matthieu.castet@parrot.com> Acked-by: Florian Fainelli <ffainelli@freebox.fr> Signed-off-by: Artem Bityutskiy <artem.bityutskiy@linux.intel.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
-rw-r--r--drivers/mtd/nand/nand_base.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 8008853..0bcc715 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -2893,7 +2893,8 @@ static int nand_flash_detect_onfi(struct mtd_info *mtd, struct nand_chip *chip,
mtd->writesize = le32_to_cpu(p->byte_per_page);
mtd->erasesize = le32_to_cpu(p->pages_per_block) * mtd->writesize;
mtd->oobsize = le16_to_cpu(p->spare_bytes_per_page);
- chip->chipsize = (uint64_t)le32_to_cpu(p->blocks_per_lun) * mtd->erasesize;
+ chip->chipsize = le32_to_cpu(p->blocks_per_lun);
+ chip->chipsize *= (uint64_t)mtd->erasesize * p->lun_count;
*busw = 0;
if (le16_to_cpu(p->features) & 1)
*busw = NAND_BUSWIDTH_16;
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