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authorChris Wilson <chris@chris-wilson.co.uk>2010-05-27 13:18:17 +0100
committerEric Anholt <eric@anholt.net>2010-05-28 10:43:25 -0700
commita7faf32d00529b9c501e37a31d4bf8acef4f8f59 (patch)
treeebd74db72938d99c149d74063780ac4cd7f151b1
parenta939406fda8ddc7de69ee9186356d09dc6daaa2c (diff)
downloadop-kernel-dev-a7faf32d00529b9c501e37a31d4bf8acef4f8f59.zip
op-kernel-dev-a7faf32d00529b9c501e37a31d4bf8acef4f8f59.tar.gz
drm/i915: Include pitch in set_base debug statement.
Add the pitch that we about to write into the control register along with the base, offset and coordinates that go into the other control registers. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Eric Anholt <eric@anholt.net>
-rw-r--r--drivers/gpu/drm/i915/intel_display.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index e504fdb..88a1ab7 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -1396,7 +1396,8 @@ intel_pipe_set_base(struct drm_crtc *crtc, int x, int y,
Start = obj_priv->gtt_offset;
Offset = y * crtc->fb->pitch + x * (crtc->fb->bits_per_pixel / 8);
- DRM_DEBUG_KMS("Writing base %08lX %08lX %d %d\n", Start, Offset, x, y);
+ DRM_DEBUG_KMS("Writing base %08lX %08lX %d %d %d\n",
+ Start, Offset, x, y, crtc->fb->pitch);
I915_WRITE(dspstride, crtc->fb->pitch);
if (IS_I965G(dev)) {
I915_WRITE(dspbase, Offset);
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