diff options
| author | Michael Chan <mchan@broadcom.com> | 2006-01-23 16:11:42 -0800 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2006-01-23 16:11:42 -0800 |
| commit | 1122db717ab5443ca9043fc0d23c1e862cfb3a61 (patch) | |
| tree | 360da4ec3f5a29c5d3a3aa1e1677072e3852f26d | |
| parent | 1269a8a64a37c8a06af672f4cff4fed16a478734 (diff) | |
| download | op-kernel-dev-1122db717ab5443ca9043fc0d23c1e862cfb3a61.zip op-kernel-dev-1122db717ab5443ca9043fc0d23c1e862cfb3a61.tar.gz | |
[BNX2]: Fix nvram sizing
Add code to correctly determine nvram size.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | drivers/net/bnx2.c | 13 | ||||
| -rw-r--r-- | drivers/net/bnx2.h | 4 |
2 files changed, 14 insertions, 3 deletions
diff --git a/drivers/net/bnx2.c b/drivers/net/bnx2.c index 7b99cf2..4f613b0 100644 --- a/drivers/net/bnx2.c +++ b/drivers/net/bnx2.c @@ -2724,9 +2724,16 @@ bnx2_init_nvram(struct bnx2 *bp) if (j == entry_count) { bp->flash_info = NULL; printk(KERN_ALERT PFX "Unknown flash/EEPROM type.\n"); - rc = -ENODEV; + return -ENODEV; } + val = REG_RD_IND(bp, bp->shmem_base + BNX2_SHARED_HW_CFG_CONFIG2); + val &= BNX2_SHARED_HW_CFG2_NVM_SIZE_MASK; + if (val) + bp->flash_size = val; + else + bp->flash_size = bp->flash_info->total_size; + return rc; } @@ -4809,10 +4816,10 @@ bnx2_get_eeprom_len(struct net_device *dev) { struct bnx2 *bp = dev->priv; - if (bp->flash_info == 0) + if (bp->flash_info == NULL) return 0; - return (int) bp->flash_info->total_size; + return (int) bp->flash_size; } static int diff --git a/drivers/net/bnx2.h b/drivers/net/bnx2.h index ea70bbc..ae17b63 100644 --- a/drivers/net/bnx2.h +++ b/drivers/net/bnx2.h @@ -4072,6 +4072,7 @@ struct bnx2 { struct net_device_stats net_stats; struct flash_spec *flash_info; + u32 flash_size; }; static u32 bnx2_reg_rd_ind(struct bnx2 *bp, u32 offset); @@ -4273,6 +4274,9 @@ struct fw_info { #define BNX2_SHARED_HW_CFG_LED_MODE_GPHY1 0x100 #define BNX2_SHARED_HW_CFG_LED_MODE_GPHY2 0x200 +#define BNX2_SHARED_HW_CFG_CONFIG2 0x00000040 +#define BNX2_SHARED_HW_CFG2_NVM_SIZE_MASK 0x00fff000 + #define BNX2_DEV_INFO_BC_REV 0x0000004c #define BNX2_PORT_HW_CFG_MAC_UPPER 0x00000050 |
