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authorDave Airlie <airlied@linux.ie>2009-09-18 15:19:37 +1000
committerDave Airlie <airlied@redhat.com>2009-09-18 16:17:42 +1000
commitfc30b8efbe1b271eb64e0d4f6cb2a91bb57ee5f3 (patch)
tree87e0fb824b19667c2570bc99bc9ca918f4a25f6e
parentbc1a631e5104317cc8b4ef7d14adc597f2844003 (diff)
downloadop-kernel-dev-fc30b8efbe1b271eb64e0d4f6cb2a91bb57ee5f3.zip
op-kernel-dev-fc30b8efbe1b271eb64e0d4f6cb2a91bb57ee5f3.tar.gz
drm/radeon/kms: move around new init path code to avoid posting at init
We really don't want to post the card at init, it takes a relatively long time and isn't required, so split the resume path into a startup path called by both init/resume and separate resume entry point to do posting. Signed-off-by: Dave Airlie <airlied@redhat.com>
-rw-r--r--drivers/gpu/drm/radeon/r420.c52
-rw-r--r--drivers/gpu/drm/radeon/r600.c38
-rw-r--r--drivers/gpu/drm/radeon/rv770.c38
3 files changed, 101 insertions, 27 deletions
diff --git a/drivers/gpu/drm/radeon/r420.c b/drivers/gpu/drm/radeon/r420.c
index 2142a47..9b38956 100644
--- a/drivers/gpu/drm/radeon/r420.c
+++ b/drivers/gpu/drm/radeon/r420.c
@@ -157,31 +157,10 @@ static void r420_clock_resume(struct radeon_device *rdev)
WREG32_PLL(R_00000D_SCLK_CNTL, sclk_cntl);
}
-int r420_resume(struct radeon_device *rdev)
+static int r420_startup(struct radeon_device *rdev)
{
int r;
- /* Make sur GART are not working */
- if (rdev->flags & RADEON_IS_PCIE)
- rv370_pcie_gart_disable(rdev);
- if (rdev->flags & RADEON_IS_PCI)
- r100_pci_gart_disable(rdev);
- /* Resume clock before doing reset */
- r420_clock_resume(rdev);
- /* Reset gpu before posting otherwise ATOM will enter infinite loop */
- if (radeon_gpu_reset(rdev)) {
- dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
- RREG32(R_000E40_RBBM_STATUS),
- RREG32(R_0007C0_CP_STAT));
- }
- /* check if cards are posted or not */
- if (rdev->is_atom_bios) {
- atom_asic_init(rdev->mode_info.atom_context);
- } else {
- radeon_combios_asic_init(rdev->ddev);
- }
- /* Resume clock after posting */
- r420_clock_resume(rdev);
r300_mc_program(rdev);
/* Initialize GART (initialize after TTM so we can allocate
* memory through TTM but finalize after TTM) */
@@ -217,6 +196,33 @@ int r420_resume(struct radeon_device *rdev)
return 0;
}
+int r420_resume(struct radeon_device *rdev)
+{
+ /* Make sur GART are not working */
+ if (rdev->flags & RADEON_IS_PCIE)
+ rv370_pcie_gart_disable(rdev);
+ if (rdev->flags & RADEON_IS_PCI)
+ r100_pci_gart_disable(rdev);
+ /* Resume clock before doing reset */
+ r420_clock_resume(rdev);
+ /* Reset gpu before posting otherwise ATOM will enter infinite loop */
+ if (radeon_gpu_reset(rdev)) {
+ dev_warn(rdev->dev, "GPU reset failed ! (0xE40=0x%08X, 0x7C0=0x%08X)\n",
+ RREG32(R_000E40_RBBM_STATUS),
+ RREG32(R_0007C0_CP_STAT));
+ }
+ /* check if cards are posted or not */
+ if (rdev->is_atom_bios) {
+ atom_asic_init(rdev->mode_info.atom_context);
+ } else {
+ radeon_combios_asic_init(rdev->ddev);
+ }
+ /* Resume clock after posting */
+ r420_clock_resume(rdev);
+
+ return r420_startup(rdev);
+}
+
int r420_suspend(struct radeon_device *rdev)
{
r100_cp_disable(rdev);
@@ -330,7 +336,7 @@ int r420_init(struct radeon_device *rdev)
}
r300_set_reg_safe(rdev);
rdev->accel_working = true;
- r = r420_resume(rdev);
+ r = r420_startup(rdev);
if (r) {
/* Somethings want wront with the accel init stop accel */
dev_err(rdev->dev, "Disabling GPU acceleration\n");
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 9844783..5f42fad 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -1466,7 +1466,7 @@ bool r600_card_posted(struct radeon_device *rdev)
return false;
}
-int r600_resume(struct radeon_device *rdev)
+int r600_startup(struct radeon_device *rdev)
{
int r;
@@ -1499,6 +1499,40 @@ int r600_resume(struct radeon_device *rdev)
return 0;
}
+int r600_resume(struct radeon_device *rdev)
+{
+ int r;
+
+ if (radeon_gpu_reset(rdev)) {
+ /* FIXME: what do we want to do here ? */
+ }
+ /* post card */
+ if (rdev->is_atom_bios) {
+ atom_asic_init(rdev->mode_info.atom_context);
+ } else {
+ radeon_combios_asic_init(rdev->ddev);
+ }
+ /* Initialize clocks */
+ r = radeon_clocks_init(rdev);
+ if (r) {
+ return r;
+ }
+
+ r = r600_startup(rdev);
+ if (r) {
+ DRM_ERROR("r600 startup failed on resume\n");
+ return r;
+ }
+
+ r = radeon_ib_test(rdev);
+ if (r) {
+ DRM_ERROR("radeon: failled testing IB (%d).\n", r);
+ return r;
+ }
+ return r;
+}
+
+
int r600_suspend(struct radeon_device *rdev)
{
/* FIXME: we should wait for ring to be empty */
@@ -1596,7 +1630,7 @@ int r600_init(struct radeon_device *rdev)
return r;
}
- r = r600_resume(rdev);
+ r = r600_startup(rdev);
if (r) {
if (rdev->flags & RADEON_IS_AGP) {
/* Retry with disabling AGP */
diff --git a/drivers/gpu/drm/radeon/rv770.c b/drivers/gpu/drm/radeon/rv770.c
index 4742762..a639966 100644
--- a/drivers/gpu/drm/radeon/rv770.c
+++ b/drivers/gpu/drm/radeon/rv770.c
@@ -851,7 +851,7 @@ int rv770_gpu_reset(struct radeon_device *rdev)
return 0;
}
-int rv770_resume(struct radeon_device *rdev)
+static int rv770_startup(struct radeon_device *rdev)
{
int r;
@@ -875,6 +875,40 @@ int rv770_resume(struct radeon_device *rdev)
return 0;
}
+int rv770_resume(struct radeon_device *rdev)
+{
+ int r;
+
+ if (radeon_gpu_reset(rdev)) {
+ /* FIXME: what do we want to do here ? */
+ }
+ /* post card */
+ if (rdev->is_atom_bios) {
+ atom_asic_init(rdev->mode_info.atom_context);
+ } else {
+ radeon_combios_asic_init(rdev->ddev);
+ }
+ /* Initialize clocks */
+ r = radeon_clocks_init(rdev);
+ if (r) {
+ return r;
+ }
+
+ r = rv770_startup(rdev);
+ if (r) {
+ DRM_ERROR("r600 startup failed on resume\n");
+ return r;
+ }
+
+ r = radeon_ib_test(rdev);
+ if (r) {
+ DRM_ERROR("radeon: failled testing IB (%d).\n", r);
+ return r;
+ }
+ return r;
+
+}
+
int rv770_suspend(struct radeon_device *rdev)
{
/* FIXME: we should wait for ring to be empty */
@@ -959,7 +993,7 @@ int rv770_init(struct radeon_device *rdev)
return r;
rdev->accel_working = true;
- r = rv770_resume(rdev);
+ r = rv770_startup(rdev);
if (r) {
if (rdev->flags & RADEON_IS_AGP) {
/* Retry with disabling AGP */
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