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author | Valentin Longchamp <valentin.longchamp@epfl.ch> | 2008-10-24 15:09:06 +0200 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2008-12-16 14:58:17 +0100 |
commit | d1b3cc6de8a145beabe62bde7999c61f63864eeb (patch) | |
tree | a65021434e2bcd3e653d40a716e425b367dc3bc7 | |
parent | df25f9da9fcc12193208e8da135c930924cd56c5 (diff) | |
download | op-kernel-dev-d1b3cc6de8a145beabe62bde7999c61f63864eeb.zip op-kernel-dev-d1b3cc6de8a145beabe62bde7999c61f63864eeb.tar.gz |
MX31: definitions for UART2 pins
UART2 pins when used in functionnal mode
Signed-off-by: Valentin Longchamp <valentin.longchamp@epfl.ch>
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
-rw-r--r-- | arch/arm/plat-mxc/include/mach/iomux-mx3.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h index 36acad2..f36305a 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h @@ -491,6 +491,10 @@ enum iomux_pins { #define MX31_PIN_RTS1__RTS1 IOMUX_MODE(MX31_PIN_RTS1, IOMUX_CONFIG_FUNC) #define MX31_PIN_TXD1__TXD1 IOMUX_MODE(MX31_PIN_TXD1, IOMUX_CONFIG_FUNC) #define MX31_PIN_RXD1__RXD1 IOMUX_MODE(MX31_PIN_RXD1, IOMUX_CONFIG_FUNC) +#define MX31_PIN_CTS2__CTS2 IOMUX_MODE(MX31_PIN_CTS2, IOMUX_CONFIG_FUNC) +#define MX31_PIN_RTS2__RTS2 IOMUX_MODE(MX31_PIN_RTS2, IOMUX_CONFIG_FUNC) +#define MX31_PIN_TXD2__TXD2 IOMUX_MODE(MX31_PIN_TXD2, IOMUX_CONFIG_FUNC) +#define MX31_PIN_RXD2__RXD2 IOMUX_MODE(MX31_PIN_RXD2, IOMUX_CONFIG_FUNC) #define MX31_PIN_CSPI1_MOSI__MOSI IOMUX_MODE(MX31_PIN_CSPI1_MOSI, IOMUX_CONFIG_FUNC) #define MX31_PIN_CSPI1_MISO__MISO IOMUX_MODE(MX31_PIN_CSPI1_MISO, IOMUX_CONFIG_FUNC) #define MX31_PIN_CSPI1_SCLK__SCLK IOMUX_MODE(MX31_PIN_CSPI1_SCLK, IOMUX_CONFIG_FUNC) |