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authorGreg Ungerer <gerg@snapgear.com>2008-02-01 17:35:03 +1000
committerLinus Torvalds <torvalds@linux-foundation.org>2008-02-01 20:55:44 +1100
commitc0ecfcd4b8998441cb6c647ee561e55cc3cd7e81 (patch)
treedb5c67d9e3571820e8c03a34f158d81c3965b9f6
parentb2e1810e6467455e6dd28c7c7170c2e9c37fd1b0 (diff)
downloadop-kernel-dev-c0ecfcd4b8998441cb6c647ee561e55cc3cd7e81.zip
op-kernel-dev-c0ecfcd4b8998441cb6c647ee561e55cc3cd7e81.tar.gz
m68knommu: platform setup for 5407 ColdFire parts
Switch to platform style configuration for 5407 ColdFire parts. Initial support is for the UARTs. DMA support moved to common code for all ColdFire parts. Signed-off-by: Greg Ungerer <gerg@uclinux.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r--arch/m68knommu/platform/5407/config.c69
1 files changed, 57 insertions, 12 deletions
diff --git a/arch/m68knommu/platform/5407/config.c b/arch/m68knommu/platform/5407/config.c
index 2d3b62e..5ed9ba5 100644
--- a/arch/m68knommu/platform/5407/config.c
+++ b/arch/m68knommu/platform/5407/config.c
@@ -13,11 +13,11 @@
#include <linux/param.h>
#include <linux/init.h>
#include <linux/interrupt.h>
-#include <asm/dma.h>
+#include <linux/io.h>
#include <asm/machdep.h>
#include <asm/coldfire.h>
#include <asm/mcfsim.h>
-#include <asm/mcfdma.h>
+#include <asm/mcfuart.h>
/***************************************************************************/
@@ -29,17 +29,51 @@ extern unsigned int mcf_timerlevel;
/***************************************************************************/
-/*
- * DMA channel base address table.
- */
-unsigned int dma_base_addr[MAX_M68K_DMA_CHANNELS] = {
- MCF_MBAR + MCFDMA_BASE0,
- MCF_MBAR + MCFDMA_BASE1,
- MCF_MBAR + MCFDMA_BASE2,
- MCF_MBAR + MCFDMA_BASE3,
+static struct mcf_platform_uart m5407_uart_platform[] = {
+ {
+ .mapbase = MCF_MBAR + MCFUART_BASE1,
+ .irq = 73,
+ },
+ {
+ .mapbase = MCF_MBAR + MCFUART_BASE2,
+ .irq = 74,
+ },
+ { },
+};
+
+static struct platform_device m5407_uart = {
+ .name = "mcfuart",
+ .id = 0,
+ .dev.platform_data = m5407_uart_platform,
};
-unsigned int dma_device_address[MAX_M68K_DMA_CHANNELS];
+static struct platform_device *m5407_devices[] __initdata = {
+ &m5407_uart,
+};
+
+/***************************************************************************/
+
+static void __init m5407_uart_init_line(int line, int irq)
+{
+ if (line == 0) {
+ writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI1, MCF_MBAR + MCFSIM_UART1ICR);
+ writeb(irq, MCFUART_BASE1 + MCFUART_UIVR);
+ mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART1);
+ } else if (line == 1) {
+ writel(MCFSIM_ICR_LEVEL6 | MCFSIM_ICR_PRI2, MCF_MBAR + MCFSIM_UART2ICR);
+ writeb(irq, MCFUART_BASE2 + MCFUART_UIVR);
+ mcf_setimr(mcf_getimr() & ~MCFSIM_IMR_UART2);
+ }
+}
+
+static void __init m5407_uarts_init(void)
+{
+ const int nrlines = ARRAY_SIZE(m5407_uart_platform);
+ int line;
+
+ for (line = 0; (line < nrlines); line++)
+ m5407_uart_init_line(line, m5407_uart_platform[line].irq);
+}
/***************************************************************************/
@@ -90,7 +124,7 @@ int mcf_timerirqpending(int timer)
/***************************************************************************/
-void config_BSP(char *commandp, int size)
+void __init config_BSP(char *commandp, int size)
{
mcf_setimr(MCFSIM_IMR_MASKALL);
@@ -105,3 +139,14 @@ void config_BSP(char *commandp, int size)
}
/***************************************************************************/
+
+static int __init init_BSP(void)
+{
+ m5407_uarts_init();
+ platform_add_devices(m5407_devices, ARRAY_SIZE(m5407_devices));
+ return 0;
+}
+
+arch_initcall(init_BSP);
+
+/***************************************************************************/
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