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| author | Eilon Greenstein <eilong@broadcom.com> | 2008-08-13 15:58:12 -0700 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2008-08-13 16:05:34 -0700 |
| commit | 345b5d52b93113d3ce82f97c2a783319fbf0fdfd (patch) | |
| tree | e4ee0913af19da208b3faf2553cdbad0b3f03f2a | |
| parent | 6bbca910e621d82b3ca93a99af9b59eb1ff3cbcd (diff) | |
| download | op-kernel-dev-345b5d52b93113d3ce82f97c2a783319fbf0fdfd.zip op-kernel-dev-345b5d52b93113d3ce82f97c2a783319fbf0fdfd.tar.gz | |
bnx2x: 1G LED does not turn off
1G LED does not turn off
The 1G LED was not switched to off when the link was lost
Signed-off-by: Eilon Greenstein <eilong@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | drivers/net/bnx2x.h | 1 | ||||
| -rw-r--r-- | drivers/net/bnx2x_link.c | 9 |
2 files changed, 10 insertions, 0 deletions
diff --git a/drivers/net/bnx2x.h b/drivers/net/bnx2x.h index e15ecfb..98d6f85 100644 --- a/drivers/net/bnx2x.h +++ b/drivers/net/bnx2x.h @@ -120,6 +120,7 @@ #define SHMEM_RD(bp, field) REG_RD(bp, SHMEM_ADDR(bp, field)) #define SHMEM_WR(bp, field, val) REG_WR(bp, SHMEM_ADDR(bp, field), val) +#define EMAC_RD(bp, reg) REG_RD(bp, emac_base + reg) #define NIG_WR(reg, val) REG_WR(bp, reg, val) #define EMAC_WR(reg, val) REG_WR(bp, emac_base + reg, val) #define BMAC_WR(reg, val) REG_WR(bp, GRCBASE_NIG + bmac_addr + reg, val) diff --git a/drivers/net/bnx2x_link.c b/drivers/net/bnx2x_link.c index 693efce..876a968 100644 --- a/drivers/net/bnx2x_link.c +++ b/drivers/net/bnx2x_link.c @@ -3769,6 +3769,8 @@ u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed, u16 hw_led_mode, u32 chip_id) { u8 rc = 0; + u32 tmp; + u32 emac_base = port ? GRCBASE_EMAC1 : GRCBASE_EMAC0; DP(NETIF_MSG_LINK, "bnx2x_set_led: port %x, mode %d\n", port, mode); DP(NETIF_MSG_LINK, "speed 0x%x, hw_led_mode 0x%x\n", speed, hw_led_mode); @@ -3777,6 +3779,9 @@ u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed, REG_WR(bp, NIG_REG_LED_10G_P0 + port*4, 0); REG_WR(bp, NIG_REG_LED_MODE_P0 + port*4, SHARED_HW_CFG_LED_MAC1); + + tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED); + EMAC_WR(EMAC_REG_EMAC_LED, (tmp | EMAC_LED_OVERRIDE)); break; case LED_MODE_OPER: @@ -3788,6 +3793,10 @@ u8 bnx2x_set_led(struct bnx2x *bp, u8 port, u8 mode, u32 speed, LED_BLINK_RATE_VAL); REG_WR(bp, NIG_REG_LED_CONTROL_BLINK_RATE_ENA_P0 + port*4, 1); + tmp = EMAC_RD(bp, EMAC_REG_EMAC_LED); + EMAC_WR(EMAC_REG_EMAC_LED, + (tmp & (~EMAC_LED_OVERRIDE))); + if (!CHIP_IS_E1H(bp) && ((speed == SPEED_2500) || (speed == SPEED_1000) || |
