diff options
author | Greg Ungerer <gerg@snapgear.com> | 2007-07-25 22:07:20 +1000 |
---|---|---|
committer | Linus Torvalds <torvalds@woody.linux-foundation.org> | 2007-07-25 11:05:01 -0700 |
commit | 7160a67305f08d52284b333f1403abbf8b0a1970 (patch) | |
tree | fdde56856b37c2f775ed757bb13ecbb9bece81ea | |
parent | 063586a6b1e877eb10621d191aeb67e361383d77 (diff) | |
download | op-kernel-dev-7160a67305f08d52284b333f1403abbf8b0a1970.zip op-kernel-dev-7160a67305f08d52284b333f1403abbf8b0a1970.tar.gz |
m68knommu: simplify ColdFire resume code
It is useless to preserve THREAD_SR in `resume'. The real user's sr
is actually in the stack. We also don't need to disable interrupts :
we'll never be in an invalid state, the sp switch is atomic.
Signed-off-by: Philippe De Muyter <phdm@macqel.be>
Signed-off-by: Greg Ungerer <gerg@uclinux.org>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
-rw-r--r-- | arch/m68knommu/platform/5307/entry.S | 11 |
1 files changed, 2 insertions, 9 deletions
diff --git a/arch/m68knommu/platform/5307/entry.S b/arch/m68knommu/platform/5307/entry.S index c358aeb..a8cd867 100644 --- a/arch/m68knommu/platform/5307/entry.S +++ b/arch/m68knommu/platform/5307/entry.S @@ -213,16 +213,12 @@ ENTRY(ret_from_interrupt) * Beware - when entering resume, prev (the current task) is * in a0, next (the new task) is in a1,so don't change these * registers until their contents are no longer needed. + * This is always called in supervisor mode, so don't bother to save + * and restore sr; user's process sr is actually in the stack. */ ENTRY(resume) movel %a0, %d1 /* get prev thread in d1 */ - movew %sr,%d0 /* save thread status reg */ - movew %d0,%a0@(TASK_THREAD+THREAD_SR) - - oril #0x700,%d0 /* disable interrupts */ - move %d0,%sr - movel sw_usp,%d0 /* save usp */ movel %d0,%a0@(TASK_THREAD+THREAD_USP) @@ -233,7 +229,4 @@ ENTRY(resume) movel %a1@(TASK_THREAD+THREAD_USP),%a0 /* restore thread user stack */ movel %a0, sw_usp - - movew %a1@(TASK_THREAD+THREAD_SR),%d0 /* restore thread status reg */ - movew %d0, %sr rts |