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authorbroonie@sirena.org.uk <broonie@sirena.org.uk>2007-03-14 19:49:13 +0000
committerJeff Garzik <jeff@garzik.org>2007-03-15 10:59:54 -0400
commit14fdd90ef2ec1878d6851ec4dd8d5abb2cef098c (patch)
treec457c4bcb040eef777a6e360ae261652764c39f8
parentb58ecad8d6ca83e97cd2928a439efb49267539dc (diff)
downloadop-kernel-dev-14fdd90ef2ec1878d6851ec4dd8d5abb2cef098c.zip
op-kernel-dev-14fdd90ef2ec1878d6851ec4dd8d5abb2cef098c.tar.gz
natsemi: Consistently use interrupt enable/disable functions
The natsemi drivers include functions for enabling and disabling interrupts from the chip but these are not used in all code paths. This patch changes the code paths that touch the interrupt enable register to use the functions. In all cases this adds an extra PCI read to post the operation but since none of these are in fast paths this shouldn't be too much of a problem. Signed-Off-By: Mark Brown <broonie@sirena.org.uk> Signed-off-by: Jeff Garzik <jeff@garzik.org>
-rw-r--r--drivers/net/natsemi.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/net/natsemi.c b/drivers/net/natsemi.c
index c6172a77a..2888880 100644
--- a/drivers/net/natsemi.c
+++ b/drivers/net/natsemi.c
@@ -1712,7 +1712,7 @@ static void init_registers(struct net_device *dev)
/* Enable interrupts by setting the interrupt mask. */
writel(DEFAULT_INTR, ioaddr + IntrMask);
- writel(1, ioaddr + IntrEnable);
+ natsemi_irq_enable(dev);
writel(RxOn | TxOn, ioaddr + ChipCmd);
writel(StatsClear, ioaddr + StatsCtrl); /* Clear Stats */
@@ -3071,7 +3071,7 @@ static void enable_wol_mode(struct net_device *dev, int enable_intr)
* Could be used to send a netlink message.
*/
writel(WOLPkt | LinkChange, ioaddr + IntrMask);
- writel(1, ioaddr + IntrEnable);
+ natsemi_irq_enable(dev);
}
}
@@ -3202,7 +3202,7 @@ static int natsemi_suspend (struct pci_dev *pdev, pm_message_t state)
disable_irq(dev->irq);
spin_lock_irq(&np->lock);
- writel(0, ioaddr + IntrEnable);
+ natsemi_irq_disable(dev);
np->hands_off = 1;
natsemi_stop_rxtx(dev);
netif_stop_queue(dev);
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