diff options
| author | Greg Ungerer <gerg@snapgear.com> | 2005-09-13 11:14:08 +1000 |
|---|---|---|
| committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-09-12 20:04:15 -0700 |
| commit | 962d69ed6f5c911fbdb23ef2304e3a5903e5ccbb (patch) | |
| tree | 2c256305537c01211ec2dcc8ea9a608f66603afe | |
| parent | 35d91f75c2c9548e606e813413f03c5cc35da969 (diff) | |
| download | op-kernel-dev-962d69ed6f5c911fbdb23ef2304e3a5903e5ccbb.zip op-kernel-dev-962d69ed6f5c911fbdb23ef2304e3a5903e5ccbb.tar.gz | |
[PATCH] m68knommu: fix cache actions for ColdFire 5249, 527x and 528x processors
Add better support for flushing the cache's on some ColdFire processors.
The 5249 cache code is now enabled (it was stubbed out), it really is
needed. Add support for the 527x and 528x families - we only use the
simple instruction cache on them.
Signed-off-by: Greg Ungerer <gerg@uclinux.com>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
| -rw-r--r-- | include/asm-m68knommu/cacheflush.h | 29 |
1 files changed, 15 insertions, 14 deletions
diff --git a/include/asm-m68knommu/cacheflush.h b/include/asm-m68knommu/cacheflush.h index aa7a2ff..026bbc9 100644 --- a/include/asm-m68knommu/cacheflush.h +++ b/include/asm-m68knommu/cacheflush.h @@ -2,23 +2,23 @@ #define _M68KNOMMU_CACHEFLUSH_H /* - * (C) Copyright 2000-2002, Greg Ungerer <gerg@snapgear.com> + * (C) Copyright 2000-2004, Greg Ungerer <gerg@snapgear.com> */ #include <linux/mm.h> #define flush_cache_all() __flush_cache_all() #define flush_cache_mm(mm) do { } while (0) -#define flush_cache_range(vma, start, end) do { } while (0) -#define flush_cache_page(vma, vmaddr, pfn) do { } while (0) -#define flush_dcache_range(start,len) do { } while (0) +#define flush_cache_range(vma, start, end) __flush_cache_all() +#define flush_cache_page(vma, vmaddr) do { } while (0) +#define flush_dcache_range(start,len) __flush_cache_all() #define flush_dcache_page(page) do { } while (0) #define flush_dcache_mmap_lock(mapping) do { } while (0) #define flush_dcache_mmap_unlock(mapping) do { } while (0) #define flush_icache_range(start,len) __flush_cache_all() #define flush_icache_page(vma,pg) do { } while (0) #define flush_icache_user_range(vma,pg,adr,len) do { } while (0) -#define flush_cache_vmap(start, end) flush_cache_all() -#define flush_cache_vunmap(start, end) flush_cache_all() +#define flush_cache_vmap(start, end) do { } while (0) +#define flush_cache_vunmap(start, end) do { } while (0) #define copy_to_user_page(vma, page, vaddr, dst, src, len) \ memcpy(dst, src, len) @@ -50,22 +50,23 @@ extern inline void __flush_cache_all(void) "movec %%d0,%%CACR\n\t" : : : "d0", "a0" ); #endif /* CONFIG_M5407 */ -#ifdef CONFIG_M5272 +#if defined(CONFIG_M527x) || defined(CONFIG_M528x) __asm__ __volatile__ ( - "movel #0x01000000, %%d0\n\t" - "movec %%d0, %%CACR\n\t" - "nop\n\t" - "movel #0x80000100, %%d0\n\t" + "movel #0x81400100, %%d0\n\t" "movec %%d0, %%CACR\n\t" "nop\n\t" : : : "d0" ); -#endif /* CONFIG_M5272 */ -#if 0 /* CONFIG_M5249 */ +#endif /* CONFIG_M527x || CONFIG_M528x */ +#ifdef CONFIG_M5272 __asm__ __volatile__ ( "movel #0x01000000, %%d0\n\t" "movec %%d0, %%CACR\n\t" "nop\n\t" - "movel #0xa0000200, %%d0\n\t" + : : : "d0" ); +#endif /* CONFIG_M5272 */ +#if CONFIG_M5249 + __asm__ __volatile__ ( + "movel #0xa1000200, %%d0\n\t" "movec %%d0, %%CACR\n\t" "nop\n\t" : : : "d0" ); |
