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author | Timothy Pearson <tpearson@raptorengineering.com> | 2018-06-23 16:25:16 -0500 |
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committer | root <root@rcs-power9-talos> | 2018-10-27 02:51:26 -0400 |
commit | f531b4c031ad6f366fa74aa8bfbc0ee69a21543c (patch) | |
tree | a0a606b50d8d11f9cddcfe5dca34da3bb60e9de8 | |
parent | 7a7f27ee2134311e1497ac2339a3c7726cafa4f8 (diff) | |
download | op-kernel-dev-f531b4c031ad6f366fa74aa8bfbc0ee69a21543c.zip op-kernel-dev-f531b4c031ad6f366fa74aa8bfbc0ee69a21543c.tar.gz |
powerpc/powernv/pci: Don't use the lower 4G TCEs in pseudo-DMA mode
Four TCEs are reserved for legacy 32-bit DMA mappings in psuedo DMA
mode. Mark these with an invalid address to avoid their use by
the TCE cache mapper.
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
-rw-r--r-- | arch/powerpc/platforms/powernv/pci-ioda.c | 8 |
1 files changed, 7 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c index 83f9db1..f4cd6a5 100644 --- a/arch/powerpc/platforms/powernv/pci-ioda.c +++ b/arch/powerpc/platforms/powernv/pci-ioda.c @@ -1780,7 +1780,7 @@ static bool pnv_pci_ioda_pe_single_vendor(struct pnv_ioda_pe *pe) static int pnv_pci_pseudo_bypass_setup(struct pnv_ioda_pe *pe) { - u64 tce_count, table_size, window_size; + u64 i, tce_count, table_size, window_size; struct pnv_phb *p = pe->phb; struct page *table_pages; __be64 *tces; @@ -1832,6 +1832,12 @@ static int pnv_pci_pseudo_bypass_setup(struct pnv_ioda_pe *pe) /* mark the first 4GB as reserved so this can still be used for 32bit */ bitmap_set(pe->tce_bitmap, 0, 1ULL << (32 - p->ioda.max_tce_order)); + /* make sure reserved first 4GB TCEs are not used by the mapper + * set each address to -1, which will never match an incoming request + */ + for (i = 0; i < 4; i++) + pe->tce_tracker[i * 2] = -1; + pe_info(pe, "pseudo-bypass sizes: tracker %d bitmap %d TCEs %lld\n", tracker_entries, bitmap_size, tce_count); |