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authorTimothy Pearson <tpearson@raptorengineering.com>2018-06-23 16:22:59 -0500
committerroot <root@rcs-power9-talos>2018-10-27 02:51:26 -0400
commit7a7f27ee2134311e1497ac2339a3c7726cafa4f8 (patch)
treedd77c5bc924593074c870acabf29164255fea669
parent1d2e1f844750a50b508453e1e6ea3dc10134d6a2 (diff)
downloadop-kernel-dev-7a7f27ee2134311e1497ac2339a3c7726cafa4f8.zip
op-kernel-dev-7a7f27ee2134311e1497ac2339a3c7726cafa4f8.tar.gz
powerpc/powernv/pci: Invalidate TCE cache after DMA map setup
Per the IODA2, TCEs must be invalidated after their settings have been changed. Invalidate the cache after the address is changed during TCE allocation when using pseudo DMA. Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
-rw-r--r--arch/powerpc/platforms/powernv/pci-dma.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/powerpc/platforms/powernv/pci-dma.c b/arch/powerpc/platforms/powernv/pci-dma.c
index 237940a..060dbc1 100644
--- a/arch/powerpc/platforms/powernv/pci-dma.c
+++ b/arch/powerpc/platforms/powernv/pci-dma.c
@@ -42,8 +42,7 @@ static int dma_pseudo_bypass_select_tce(struct pnv_ioda_pe *pe, phys_addr_t addr
new = cpu_to_be64(addr | TCE_PCI_READ | TCE_PCI_WRITE);
pe->tces[tce] = new;
mb();
- pe_info(pe, "allocating TCE %i 0x%016llx (old 0x%016llx)\n",
- tce, new, old);
+ pnv_pci_ioda2_tce_invalidate_pe(pe);
spin_unlock_irqrestore(&pe->tce_alloc_lock, flags);
return tce;
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