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| author | Elaine Zhang <zhangqing@rock-chips.com> | 2017-09-01 10:01:44 +0800 |
|---|---|---|
| committer | Heiko Stuebner <heiko@sntech.de> | 2017-09-17 01:55:36 +0200 |
| commit | e8620acc90785ecbde041d241a13778044df9208 (patch) | |
| tree | 6eabdea1ec9a90d0c60b565c9f98c730caa8ee36 | |
| parent | 2bd6bf03f4c1c59381d62c61d03f6cc3fe71f66e (diff) | |
| download | op-kernel-dev-e8620acc90785ecbde041d241a13778044df9208.zip op-kernel-dev-e8620acc90785ecbde041d241a13778044df9208.tar.gz | |
clk: rockchip: add pclk_pmu as critical clock on rk3128
pclk_pmu need always on, and no dts node to handle this clk,
so make it as critical clock
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
| -rw-r--r-- | drivers/clk/rockchip/clk-rk3128.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/clk/rockchip/clk-rk3128.c b/drivers/clk/rockchip/clk-rk3128.c index 62d7854..f15c9b8 100644 --- a/drivers/clk/rockchip/clk-rk3128.c +++ b/drivers/clk/rockchip/clk-rk3128.c @@ -541,7 +541,7 @@ static struct rockchip_clk_branch common_clk_branches[] __initdata = { GATE(0, "pclk_grf", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 4, GFLAGS), GATE(0, "pclk_mipiphy", "pclk_cpu", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(5), 0, GFLAGS), - GATE(0, "pclk_pmu", "pclk_pmu_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(9), 2, GFLAGS), + GATE(0, "pclk_pmu", "pclk_pmu_pre", 0, RK2928_CLKGATE_CON(9), 2, GFLAGS), GATE(0, "pclk_pmu_niu", "pclk_pmu_pre", CLK_IGNORE_UNUSED, RK2928_CLKGATE_CON(9), 3, GFLAGS), /* PD_MMC */ @@ -577,6 +577,7 @@ static const char *const rk3128_critical_clocks[] __initconst = { "aclk_peri", "hclk_peri", "pclk_peri", + "pclk_pmu", }; static struct rockchip_clk_provider *__init rk3128_common_clk_init(struct device_node *np) |
