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authorJoerg Roedel <joerg.roedel@amd.com>2008-09-09 19:11:51 +0200
committerAvi Kivity <avi@qumranet.com>2008-09-11 11:39:25 +0300
commite5eab0cede4b1ffaca4ad857d840127622038e55 (patch)
tree1471ba4a46298778271f1440b14a5f4e795bc291
parent44874f84918e37b64bec6df1587e5fe2fdf6ab62 (diff)
downloadop-kernel-dev-e5eab0cede4b1ffaca4ad857d840127622038e55.zip
op-kernel-dev-e5eab0cede4b1ffaca4ad857d840127622038e55.tar.gz
KVM: SVM: fix guest global tlb flushes with NPT
Accesses to CR4 are intercepted even with Nested Paging enabled. But the code does not check if the guest wants to do a global TLB flush. So this flush gets lost. This patch adds the check and the flush to svm_set_cr4. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
-rw-r--r--arch/x86/kvm/svm.c4
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index d1106cd..8233b86 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -879,6 +879,10 @@ set:
static void svm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
{
unsigned long host_cr4_mce = read_cr4() & X86_CR4_MCE;
+ unsigned long old_cr4 = to_svm(vcpu)->vmcb->save.cr4;
+
+ if (npt_enabled && ((old_cr4 ^ cr4) & X86_CR4_PGE))
+ force_new_asid(vcpu);
vcpu->arch.cr4 = cr4;
if (!npt_enabled)
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