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authorHuang Shijie <b32955@freescale.com>2013-10-18 10:32:52 +0800
committerShawn Guo <shawn.guo@linaro.org>2013-10-18 16:27:38 +0800
commitdc1089206d1f85fa1b3bd84ea633cbcb12a63956 (patch)
tree5d71d8d5f3fa13b77772ebe6e0a7900a8a10277f
parent443b6585acf70bd9a695fe4fc9325c29c96d7fde (diff)
downloadop-kernel-dev-dc1089206d1f85fa1b3bd84ea633cbcb12a63956.zip
op-kernel-dev-dc1089206d1f85fa1b3bd84ea633cbcb12a63956.tar.gz
ARM: dts: imx6sl: add a pinctrl for ECSPI1
add a pinctrl for ECSPI1. This pinctrl can be used in the imx6sl-evk board. Signed-off-by: Huang Shijie <b32955@freescale.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
-rw-r--r--arch/arm/boot/dts/imx6sl.dtsi10
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sl.dtsi b/arch/arm/boot/dts/imx6sl.dtsi
index e4d6d1e..0a2d614 100644
--- a/arch/arm/boot/dts/imx6sl.dtsi
+++ b/arch/arm/boot/dts/imx6sl.dtsi
@@ -541,6 +541,16 @@
compatible = "fsl,imx6sl-iomuxc";
reg = <0x020e0000 0x4000>;
+ ecspi1 {
+ pinctrl_ecspi1_1: ecspi1grp-1 {
+ fsl,pins = <
+ MX6SL_PAD_ECSPI1_MISO__ECSPI1_MISO 0x100b1
+ MX6SL_PAD_ECSPI1_MOSI__ECSPI1_MOSI 0x100b1
+ MX6SL_PAD_ECSPI1_SCLK__ECSPI1_SCLK 0x100b1
+ >;
+ };
+ };
+
fec {
pinctrl_fec_1: fecgrp-1 {
fsl,pins = <
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