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| author | Will Deacon <will.deacon@arm.com> | 2015-02-04 12:17:55 +0000 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2015-07-27 14:34:39 +0100 |
| commit | d964b7229e7f94428a1e8d26999adffbe8a69db2 (patch) | |
| tree | aa0b764dee60f631d5a61b941f4fd40a6513724f | |
| parent | 40a1db2434a1b62332b1af25cfa14d7b8c0301fe (diff) | |
| download | op-kernel-dev-d964b7229e7f94428a1e8d26999adffbe8a69db2.zip op-kernel-dev-d964b7229e7f94428a1e8d26999adffbe8a69db2.tar.gz | |
arm64: alternatives: add cpu feature for lse atomics
Add a CPU feature for the LSE atomic instructions, so that they can be
patched in at runtime when we detect that they are supported.
Reviewed-by: Steve Capper <steve.capper@arm.com>
Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
| -rw-r--r-- | arch/arm64/include/asm/cpufeature.h | 3 | ||||
| -rw-r--r-- | arch/arm64/kernel/setup.c | 1 |
2 files changed, 3 insertions, 1 deletions
diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 40e106f..d9262d4 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -26,8 +26,9 @@ #define ARM64_WORKAROUND_845719 2 #define ARM64_HAS_SYSREG_GIC_CPUIF 3 #define ARM64_HAS_PAN 4 +#define ARM64_CPU_FEAT_LSE_ATOMICS 5 -#define ARM64_NCAPS 5 +#define ARM64_NCAPS 6 #ifndef __ASSEMBLY__ diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index b2f9895..f4fbbc8 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -284,6 +284,7 @@ static void __init setup_processor(void) default: case 2: elf_hwcap |= HWCAP_ATOMICS; + cpus_set_cap(ARM64_CPU_FEAT_LSE_ATOMICS); case 1: /* RESERVED */ case 0: |
