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| author | Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com> | 2017-12-09 16:59:18 +0300 |
|---|---|---|
| committer | Vineet Gupta <vgupta@synopsys.com> | 2017-12-20 12:41:45 -0800 |
| commit | d7de73b586b2db540187ff8a077330fa1a8efd64 (patch) | |
| tree | d452a70e39331d25a19b8d8c95e9d00d06094ea5 | |
| parent | fbd1cec57064aa1380726ec899c49fcd84e702b9 (diff) | |
| download | op-kernel-dev-d7de73b586b2db540187ff8a077330fa1a8efd64.zip op-kernel-dev-d7de73b586b2db540187ff8a077330fa1a8efd64.tar.gz | |
ARC: [plat-axs103] refactor the quad core DT quirk code
Refactor the quad core DT quirk code:
get rid of waste division and multiplication by 1000000 constant.
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Eugeniy Paltsev <Eugeniy.Paltsev@synopsys.com>
Signed-off-by: Vineet Gupta <vgupta@synopsys.com>
| -rw-r--r-- | arch/arc/plat-axs10x/axs10x.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arc/plat-axs10x/axs10x.c b/arch/arc/plat-axs10x/axs10x.c index ac1a712..46544e8 100644 --- a/arch/arc/plat-axs10x/axs10x.c +++ b/arch/arc/plat-axs10x/axs10x.c @@ -317,19 +317,21 @@ static void __init axs103_early_init(void) * Instead of duplicating defconfig/DT for SMP/QUAD, add a small hack * of fudging the freq in DT */ +#define AXS103_QUAD_CORE_CPU_FREQ_HZ 50000000 + unsigned int num_cores = (read_aux_reg(ARC_REG_MCIP_BCR) >> 16) & 0x3F; if (num_cores > 2) { - u32 freq = 50, orig; + u32 freq; int off = fdt_path_offset(initial_boot_params, "/cpu_card/core_clk"); const struct fdt_property *prop; prop = fdt_get_property(initial_boot_params, off, "assigned-clock-rates", NULL); - orig = be32_to_cpu(*(u32*)(prop->data)) / 1000000; + freq = be32_to_cpu(*(u32 *)(prop->data)); /* Patching .dtb in-place with new core clock value */ - if (freq != orig ) { - freq = cpu_to_be32(freq * 1000000); + if (freq != AXS103_QUAD_CORE_CPU_FREQ_HZ) { + freq = cpu_to_be32(AXS103_QUAD_CORE_CPU_FREQ_HZ); fdt_setprop_inplace(initial_boot_params, off, "assigned-clock-rates", &freq, sizeof(freq)); } |
