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| author | Javier Martinez Canillas <javier@osg.samsung.com> | 2015-09-07 18:24:18 +0200 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2015-09-14 12:13:38 -0700 |
| commit | d34cf0d56658ff040c707313b4a71e86a767cbc2 (patch) | |
| tree | f90e88b858fc75780f33def7b71f069c64c6e74e | |
| parent | c22c7f3e667bece46efe97780ab2df3af700aea0 (diff) | |
| download | op-kernel-dev-d34cf0d56658ff040c707313b4a71e86a767cbc2.zip op-kernel-dev-d34cf0d56658ff040c707313b4a71e86a767cbc2.tar.gz | |
ARM: dts: omap3-igep: Move eth IRQ pinmux to IGEPv2 common dtsi
Only the IGEPv2 boards have a LAN9221i chip connected to the GPMC
so the pinmux configuration for the GPIO connected to the IRQ line
of the LAN chip should not be defined in the IGEP common dtsi but
in the one common to the IGEPv2 boards.
While there, use the OMAP3_CORE1_IOPAD() macro for the padconf reg.
Suggested-by: Ladislav Michl <ladis@linux-mips.org>
Signed-off-by: Javier Martinez Canillas <javier@osg.samsung.com>
Acked-by: Enric Balletbo i Serra <enric.balletbo@collabora.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
| -rw-r--r-- | arch/arm/boot/dts/omap3-igep.dtsi | 6 | ||||
| -rw-r--r-- | arch/arm/boot/dts/omap3-igep0020-common.dtsi | 6 |
2 files changed, 6 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/omap3-igep.dtsi b/arch/arm/boot/dts/omap3-igep.dtsi index d5e5cd4..2230e1c 100644 --- a/arch/arm/boot/dts/omap3-igep.dtsi +++ b/arch/arm/boot/dts/omap3-igep.dtsi @@ -78,12 +78,6 @@ >; }; - smsc9221_pins: pinmux_smsc9221_pins { - pinctrl-single,pins = < - 0x1a2 (PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ - >; - }; - i2c1_pins: pinmux_i2c1_pins { pinctrl-single,pins = < 0x18a (PIN_INPUT | MUX_MODE0) /* i2c1_scl.i2c1_scl */ diff --git a/arch/arm/boot/dts/omap3-igep0020-common.dtsi b/arch/arm/boot/dts/omap3-igep0020-common.dtsi index e458c21..5ad688c 100644 --- a/arch/arm/boot/dts/omap3-igep0020-common.dtsi +++ b/arch/arm/boot/dts/omap3-igep0020-common.dtsi @@ -156,6 +156,12 @@ OMAP3_CORE1_IOPAD(0x217a, PIN_INPUT | MUX_MODE0) /* uart2_rx.uart2_rx */ >; }; + + smsc9221_pins: pinmux_smsc9221_pins { + pinctrl-single,pins = < + OMAP3_CORE1_IOPAD(0x21d2, PIN_INPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ + >; + }; }; &omap3_pmx_core2 { |
