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author | Timothy Pearson <tpearson@raptorengineering.com> | 2018-06-23 16:22:59 -0500 |
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committer | Timothy Pearson <tpearson@raptorengineering.com> | 2018-06-23 16:29:47 -0500 |
commit | cba940335dfa3bf93ef6991da2eb2eda145895c8 (patch) | |
tree | e73e3ffee7c343a49416c69ba17d016ebbac7506 | |
parent | bd906134ed623e15d152696659aea1d594437ef9 (diff) | |
download | op-kernel-dev-cba940335dfa3bf93ef6991da2eb2eda145895c8.zip op-kernel-dev-cba940335dfa3bf93ef6991da2eb2eda145895c8.tar.gz |
powerpc/powernv/pci: Invalidate TCE cache after DMA map setup
Per the IODA2, TCEs must be invalidated after their settings
have been changed. Invalidate the cache after the address
is changed during TCE allocation when using pseudo DMA.
Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
-rw-r--r-- | arch/powerpc/platforms/powernv/pci-dma.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/powerpc/platforms/powernv/pci-dma.c b/arch/powerpc/platforms/powernv/pci-dma.c index 237940a..060dbc1 100644 --- a/arch/powerpc/platforms/powernv/pci-dma.c +++ b/arch/powerpc/platforms/powernv/pci-dma.c @@ -42,8 +42,7 @@ static int dma_pseudo_bypass_select_tce(struct pnv_ioda_pe *pe, phys_addr_t addr new = cpu_to_be64(addr | TCE_PCI_READ | TCE_PCI_WRITE); pe->tces[tce] = new; mb(); - pe_info(pe, "allocating TCE %i 0x%016llx (old 0x%016llx)\n", - tce, new, old); + pnv_pci_ioda2_tce_invalidate_pe(pe); spin_unlock_irqrestore(&pe->tce_alloc_lock, flags); return tce; |