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author | Catalin Marinas <catalin.marinas@arm.com> | 2011-11-22 17:30:29 +0000 |
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committer | Catalin Marinas <catalin.marinas@arm.com> | 2011-12-08 10:30:40 +0000 |
commit | c9f27f1026f55b543df260ad8ab84a7bdab7792f (patch) | |
tree | dc43f5eff07e385f3943a9e99766a68e8ebb33b9 | |
parent | 1b6ba46b7efa31055eb993a6f2c6bbcb8b35b001 (diff) | |
download | op-kernel-dev-c9f27f1026f55b543df260ad8ab84a7bdab7792f.zip op-kernel-dev-c9f27f1026f55b543df260ad8ab84a7bdab7792f.tar.gz |
ARM: LPAE: Invalidate the TLB before freeing the PMD
Similar to the PTE freeing, this patch introduced __pmd_free_tlb() which
invalidates the TLB before freeing a PMD page. This is needed because on
newer processors the entry in the upper page table may be cached by the
TLB and point to random data after the PMD has been freed.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
-rw-r--r-- | arch/arm/include/asm/tlb.h | 11 |
1 files changed, 10 insertions, 1 deletions
diff --git a/arch/arm/include/asm/tlb.h b/arch/arm/include/asm/tlb.h index b509e44..5d3ed7e3 100644 --- a/arch/arm/include/asm/tlb.h +++ b/arch/arm/include/asm/tlb.h @@ -202,8 +202,17 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, tlb_remove_page(tlb, pte); } +static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, + unsigned long addr) +{ +#ifdef CONFIG_ARM_LPAE + tlb_add_flush(tlb, addr); + tlb_remove_page(tlb, virt_to_page(pmdp)); +#endif +} + #define pte_free_tlb(tlb, ptep, addr) __pte_free_tlb(tlb, ptep, addr) -#define pmd_free_tlb(tlb, pmdp, addr) pmd_free((tlb)->mm, pmdp) +#define pmd_free_tlb(tlb, pmdp, addr) __pmd_free_tlb(tlb, pmdp, addr) #define pud_free_tlb(tlb, pudp, addr) pud_free((tlb)->mm, pudp) #define tlb_migrate_finish(mm) do { } while (0) |