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authorAndreas Larsson <andreas@gaisler.com>2012-11-19 13:17:48 +0100
committerWolfram Sang <w.sang@pengutronix.de>2012-11-22 22:34:35 +0100
commitc5d5474425c4e7e291a98e739ea65f8acd0d8d5c (patch)
tree113d89b36e91c14b2405e1c3f4e38c52b608cfa1
parent658122fe5e3a72940631ceda3efcb841054d91dc (diff)
downloadop-kernel-dev-c5d5474425c4e7e291a98e739ea65f8acd0d8d5c.zip
op-kernel-dev-c5d5474425c4e7e291a98e739ea65f8acd0d8d5c.tar.gz
i2c: ocores: Move grlib set/get functions into #ifdef CONFIG_OF block
This moves the grlib set and get functions into the #ifdef CONFIG_OF block to avoid warnings of unimplemented functions when compiling with -Wunused-function when CONFIG_OF is not defined. Signed-off-by: Andreas Larsson <andreas@gaisler.com> Acked-by: Peter Korsgaard <jacmet@sunsite.dk> Signed-off-by: Wolfram Sang <w.sang@pengutronix.de>
-rw-r--r--drivers/i2c/busses/i2c-ocores.c68
1 files changed, 34 insertions, 34 deletions
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index 0ea8419..df69598 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -109,40 +109,6 @@ static inline u8 oc_getreg_32(struct ocores_i2c *i2c, int reg)
return ioread32(i2c->base + (reg << i2c->reg_shift));
}
-/* Read and write functions for the GRLIB port of the controller. Registers are
- * 32-bit big endian and the PRELOW and PREHIGH registers are merged into one
- * register. The subsequent registers has their offset decreased accordingly. */
-static u8 oc_getreg_grlib(struct ocores_i2c *i2c, int reg)
-{
- u32 rd;
- int rreg = reg;
- if (reg != OCI2C_PRELOW)
- rreg--;
- rd = ioread32be(i2c->base + (rreg << i2c->reg_shift));
- if (reg == OCI2C_PREHIGH)
- return (u8)(rd >> 8);
- else
- return (u8)rd;
-}
-
-static void oc_setreg_grlib(struct ocores_i2c *i2c, int reg, u8 value)
-{
- u32 curr, wr;
- int rreg = reg;
- if (reg != OCI2C_PRELOW)
- rreg--;
- if (reg == OCI2C_PRELOW || reg == OCI2C_PREHIGH) {
- curr = ioread32be(i2c->base + (rreg << i2c->reg_shift));
- if (reg == OCI2C_PRELOW)
- wr = (curr & 0xff00) | value;
- else
- wr = (((u32)value) << 8) | (curr & 0xff);
- } else {
- wr = value;
- }
- iowrite32be(wr, i2c->base + (rreg << i2c->reg_shift));
-}
-
static inline void oc_setreg(struct ocores_i2c *i2c, int reg, u8 value)
{
i2c->setreg(i2c, reg, value);
@@ -303,6 +269,40 @@ static struct of_device_id ocores_i2c_match[] = {
MODULE_DEVICE_TABLE(of, ocores_i2c_match);
#ifdef CONFIG_OF
+/* Read and write functions for the GRLIB port of the controller. Registers are
+ * 32-bit big endian and the PRELOW and PREHIGH registers are merged into one
+ * register. The subsequent registers has their offset decreased accordingly. */
+static u8 oc_getreg_grlib(struct ocores_i2c *i2c, int reg)
+{
+ u32 rd;
+ int rreg = reg;
+ if (reg != OCI2C_PRELOW)
+ rreg--;
+ rd = ioread32be(i2c->base + (rreg << i2c->reg_shift));
+ if (reg == OCI2C_PREHIGH)
+ return (u8)(rd >> 8);
+ else
+ return (u8)rd;
+}
+
+static void oc_setreg_grlib(struct ocores_i2c *i2c, int reg, u8 value)
+{
+ u32 curr, wr;
+ int rreg = reg;
+ if (reg != OCI2C_PRELOW)
+ rreg--;
+ if (reg == OCI2C_PRELOW || reg == OCI2C_PREHIGH) {
+ curr = ioread32be(i2c->base + (rreg << i2c->reg_shift));
+ if (reg == OCI2C_PRELOW)
+ wr = (curr & 0xff00) | value;
+ else
+ wr = (((u32)value) << 8) | (curr & 0xff);
+ } else {
+ wr = value;
+ }
+ iowrite32be(wr, i2c->base + (rreg << i2c->reg_shift));
+}
+
static int ocores_i2c_of_probe(struct platform_device *pdev,
struct ocores_i2c *i2c)
{
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