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| author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2013-07-26 10:17:41 -0300 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2013-08-06 14:10:09 +0000 |
| commit | c5d0ecc98ca94eb55eacda034a304d5d028d514a (patch) | |
| tree | ee32758e2a3727d697e0e6044e731e15cbf3b1c7 | |
| parent | 8baeeeb2f1adeded0ba2d2dc6f8e4694aed5b81e (diff) | |
| download | op-kernel-dev-c5d0ecc98ca94eb55eacda034a304d5d028d514a.zip op-kernel-dev-c5d0ecc98ca94eb55eacda034a304d5d028d514a.tar.gz | |
ARM: mv78xx0: Move to ID based window creation
With the introduction of the ID based MBus API, it's better
to switch to use it instead of the current name based scheme.
This will allow to deprecate the name based API, once every
user is removed.
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Tested-by: Andrew Lunn <andrew@lunn.ch>
Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
| -rw-r--r-- | arch/arm/mach-mv78xx0/pcie.c | 23 |
1 files changed, 11 insertions, 12 deletions
diff --git a/arch/arm/mach-mv78xx0/pcie.c b/arch/arm/mach-mv78xx0/pcie.c index dc26a65..445e553 100644 --- a/arch/arm/mach-mv78xx0/pcie.c +++ b/arch/arm/mach-mv78xx0/pcie.c @@ -18,6 +18,11 @@ #include <mach/mv78xx0.h> #include "common.h" +#define MV78XX0_MBUS_PCIE_MEM_TARGET(port, lane) ((port) ? 8 : 4) +#define MV78XX0_MBUS_PCIE_MEM_ATTR(port, lane) (0xf8 & ~(0x10 << (lane))) +#define MV78XX0_MBUS_PCIE_IO_TARGET(port, lane) ((port) ? 8 : 4) +#define MV78XX0_MBUS_PCIE_IO_ATTR(port, lane) (0xf0 & ~(0x10 << (lane))) + struct pcie_port { u8 maj; u8 min; @@ -71,7 +76,6 @@ static void __init mv78xx0_pcie_preinit(void) start = MV78XX0_PCIE_MEM_PHYS_BASE; for (i = 0; i < num_pcie_ports; i++) { struct pcie_port *pp = pcie_port + i; - char winname[MVEBU_MBUS_MAX_WINNAME_SZ]; snprintf(pp->mem_space_name, sizeof(pp->mem_space_name), "PCIe %d.%d MEM", pp->maj, pp->min); @@ -85,17 +89,12 @@ static void __init mv78xx0_pcie_preinit(void) if (request_resource(&iomem_resource, &pp->res)) panic("can't allocate PCIe MEM sub-space"); - snprintf(winname, sizeof(winname), "pcie%d.%d", - pp->maj, pp->min); - - mvebu_mbus_add_window_remap_flags(winname, - pp->res.start, - resource_size(&pp->res), - MVEBU_MBUS_NO_REMAP, - MVEBU_MBUS_PCI_MEM); - mvebu_mbus_add_window_remap_flags(winname, - i * SZ_64K, SZ_64K, - 0, MVEBU_MBUS_PCI_IO); + mvebu_mbus_add_window_by_id(MV78XX0_MBUS_PCIE_MEM_TARGET(pp->maj, pp->min), + MV78XX0_MBUS_PCIE_MEM_ATTR(pp->maj, pp->min), + pp->res.start, resource_size(&pp->res)); + mvebu_mbus_add_window_remap_by_id(MV78XX0_MBUS_PCIE_IO_TARGET(pp->maj, pp->min), + MV78XX0_MBUS_PCIE_IO_ATTR(pp->maj, pp->min), + i * SZ_64K, SZ_64K, 0); } } |
