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authorStephen Boyd <sboyd@codeaurora.org>2014-06-25 14:44:19 -0700
committerMike Turquette <mturquette@linaro.org>2014-07-02 16:33:18 -0700
commitc556bcddc78096caeb46dbe3ad0314dd951f1665 (patch)
treedc90b8b8bc463e5eb8bca16f2bcc4253e4f5a34b
parent4924b8a2fa137335bef82829733b30a5172e51b3 (diff)
downloadop-kernel-dev-c556bcddc78096caeb46dbe3ad0314dd951f1665.zip
op-kernel-dev-c556bcddc78096caeb46dbe3ad0314dd951f1665.tar.gz
clk: qcom: HDMI source sel is 3 not 2
The HDMI PLL input to the tv mux is supposed to be 3, not 2. Fix the code so that we can properly select the HDMI PLL. Fixes: 6d00b56fe "clk: qcom: Add support for MSM8960's multimedia clock controller (MMCC)" Reported-by: Rob Clark <robdclark@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
-rw-r--r--drivers/clk/qcom/mmcc-msm8960.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/qcom/mmcc-msm8960.c b/drivers/clk/qcom/mmcc-msm8960.c
index 12f3c0b..4c449b3 100644
--- a/drivers/clk/qcom/mmcc-msm8960.c
+++ b/drivers/clk/qcom/mmcc-msm8960.c
@@ -1209,7 +1209,7 @@ static struct clk_branch rot_clk = {
static u8 mmcc_pxo_hdmi_map[] = {
[P_PXO] = 0,
- [P_HDMI_PLL] = 2,
+ [P_HDMI_PLL] = 3,
};
static const char *mmcc_pxo_hdmi[] = {
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