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authorTim Harvey <tharvey@gateworks.com>2016-11-16 08:26:40 -0800
committerShawn Guo <shawnguo@kernel.org>2017-01-02 13:59:42 +0800
commitb0a5c46d6f1d0521bbbca9631da51b3fe1dc89e3 (patch)
treeb44c79133ea166e685062a29666c42438c0ef9b7
parentd447dd884af380d245207e6ce99a5fb8cba41b7c (diff)
downloadop-kernel-dev-b0a5c46d6f1d0521bbbca9631da51b3fe1dc89e3.zip
op-kernel-dev-b0a5c46d6f1d0521bbbca9631da51b3fe1dc89e3.tar.gz
ARM: dts: imx: add SPI to GW54xx
The GW54xx revision E adds SPI via an off-board connector. Signed-off-by: Tim Harvey <tharvey@gateworks.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
-rw-r--r--arch/arm/boot/dts/imx6qdl-gw54xx.dtsi17
1 files changed, 17 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
index 1753ab7..1cdb2a7 100644
--- a/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
@@ -149,6 +149,14 @@
<&clks IMX6QDL_CLK_PLL3_USB_OTG>;
};
+&ecspi2 {
+ fsl,spi-num-chipselects = <1>;
+ cs-gpios = <&gpio2 26 GPIO_ACTIVE_HIGH>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ecspi2>;
+ status = "okay";
+};
+
&fec {
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_enet>;
@@ -499,6 +507,15 @@
>;
};
+ pinctrl_ecspi2: escpi2grp {
+ fsl,pins = <
+ MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
+ MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
+ MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
+ MX6QDL_PAD_EIM_RW__GPIO2_IO26 0x100b1
+ >;
+ };
+
pinctrl_flexcan1: flexcan1grp {
fsl,pins = <
MX6QDL_PAD_KEY_ROW2__FLEXCAN1_RX 0x1b0b1
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