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| author | David S. Miller <davem@davemloft.net> | 2015-12-28 00:19:38 -0500 |
|---|---|---|
| committer | David S. Miller <davem@davemloft.net> | 2015-12-28 00:19:38 -0500 |
| commit | ae498411651a42a56fc85fa0f1ab1eccd56db87a (patch) | |
| tree | 9fb1545b49115ef5129c3ee40ace584bc6239491 | |
| parent | 032c5e82847a2214c3196a90f0aeba0ce252de58 (diff) | |
| parent | 584933334b7a81f09637f28cbee759a1e24428db (diff) | |
| download | op-kernel-dev-ae498411651a42a56fc85fa0f1ab1eccd56db87a.zip op-kernel-dev-ae498411651a42a56fc85fa0f1ab1eccd56db87a.tar.gz | |
Merge branch 'r8169-RTL8168H-PHY-fixes'
Chunhao Lin says:
====================
r8169: Update RTL8168H PHY parameters
Fix typo in setting PHY parameter and update the way of reading PHY register
"rg_saw_cnt".
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
| -rw-r--r-- | drivers/net/ethernet/realtek/r8169.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c index 79ef799..58365bc 100644 --- a/drivers/net/ethernet/realtek/r8169.c +++ b/drivers/net/ethernet/realtek/r8169.c @@ -3947,7 +3947,7 @@ static void rtl8168h_2_hw_phy_config(struct rtl8169_private *tp) data = (ioffset_p3<<12)|(ioffset_p2<<8)|(ioffset_p1<<4)|(ioffset_p0); if ((ioffset_p3 != 0x0f) || (ioffset_p2 != 0x0f) || - (ioffset_p1 != 0x0f) || (ioffset_p0 == 0x0f)) { + (ioffset_p1 != 0x0f) || (ioffset_p0 != 0x0f)) { rtl_writephy(tp, 0x1f, 0x0bcf); rtl_writephy(tp, 0x16, data); rtl_writephy(tp, 0x1f, 0x0000); @@ -6136,7 +6136,7 @@ static void rtl_hw_start_8168h_1(struct rtl8169_private *tp) rtl_pcie_state_l2l3_enable(tp, false); rtl_writephy(tp, 0x1f, 0x0c42); - rg_saw_cnt = rtl_readphy(tp, 0x13); + rg_saw_cnt = (rtl_readphy(tp, 0x13) & 0x3fff); rtl_writephy(tp, 0x1f, 0x0000); if (rg_saw_cnt > 0) { u16 sw_cnt_1ms_ini; |
