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authorHuacai Chen <chenhc@lemote.com>2015-03-29 10:54:05 +0800
committerRalf Baechle <ralf@linux-mips.org>2015-04-10 15:41:52 +0200
commita843d00d038b11267279e3b5388222320f9ddc1d (patch)
tree130a3b0c560f838bf77ce9917c6563b78e2122ce
parent90db024f140d0d6ad960cc5f090e3c8ed890ca55 (diff)
downloadop-kernel-dev-a843d00d038b11267279e3b5388222320f9ddc1d.zip
op-kernel-dev-a843d00d038b11267279e3b5388222320f9ddc1d.tar.gz
MIPS: Hibernate: flush TLB entries earlier
We found that TLB mismatch not only happens after kernel resume, but also happens during snapshot restore. So move it to the beginning of swsusp_arch_suspend(). Signed-off-by: Huacai Chen <chenhc@lemote.com> Cc: <stable@vger.kernel.org> Cc: Steven J. Hill <Steven.Hill@imgtec.com> Cc: linux-mips@linux-mips.org Cc: Fuxin Zhang <zhangfx@lemote.com> Cc: Zhangjin Wu <wuzhangjin@gmail.com> Cc: stable@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9621/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/power/hibernate.S3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/mips/power/hibernate.S b/arch/mips/power/hibernate.S
index 32a7c82..e7567c8 100644
--- a/arch/mips/power/hibernate.S
+++ b/arch/mips/power/hibernate.S
@@ -30,6 +30,8 @@ LEAF(swsusp_arch_suspend)
END(swsusp_arch_suspend)
LEAF(swsusp_arch_resume)
+ /* Avoid TLB mismatch during and after kernel resume */
+ jal local_flush_tlb_all
PTR_L t0, restore_pblist
0:
PTR_L t1, PBE_ADDRESS(t0) /* source */
@@ -43,7 +45,6 @@ LEAF(swsusp_arch_resume)
bne t1, t3, 1b
PTR_L t0, PBE_NEXT(t0)
bnez t0, 0b
- jal local_flush_tlb_all /* Avoid TLB mismatch after kernel resume */
PTR_LA t0, saved_regs
PTR_L ra, PT_R31(t0)
PTR_L sp, PT_R29(t0)
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