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authorFelix Fietkau <nbd@openwrt.org>2013-08-28 10:41:42 +0200
committerRalf Baechle <ralf@linux-mips.org>2013-09-03 23:22:16 +0200
commita1191927ace7e6f827132aa9e062779eb3f11fa5 (patch)
tree9ec877d5a23a42c22a55c8db701589bfb36389de
parent70c3c4cd2d8ad44231da50830234d3f5e5170613 (diff)
downloadop-kernel-dev-a1191927ace7e6f827132aa9e062779eb3f11fa5.zip
op-kernel-dev-a1191927ace7e6f827132aa9e062779eb3f11fa5.tar.gz
MIPS: ath79: Fix ar933x watchdog clock
The watchdog device on the AR933x is connected to the AHB clock, however the current code uses the reference clock. Due to the wrong rate, the watchdog driver can't calculate correct register values for a given timeout value and the watchdog unexpectedly restarts the system. The code uses the wrong value since the initial commit 04225e1d227c8e68d685936ecf42ac175fec0e54 (MIPS: ath79: add AR933X specific clock init) The patch fixes the code to use the correct clock rate to avoid the problem. Cc: stable@vger.kernel.org Signed-off-by: Felix Fietkau <nbd@openwrt.org> Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5777/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/ath79/clock.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/mips/ath79/clock.c b/arch/mips/ath79/clock.c
index 765ef30..733017b 100644
--- a/arch/mips/ath79/clock.c
+++ b/arch/mips/ath79/clock.c
@@ -164,7 +164,7 @@ static void __init ar933x_clocks_init(void)
ath79_ahb_clk.rate = freq / t;
}
- ath79_wdt_clk.rate = ath79_ref_clk.rate;
+ ath79_wdt_clk.rate = ath79_ahb_clk.rate;
ath79_uart_clk.rate = ath79_ref_clk.rate;
}
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