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author | David S. Miller <davem@davemloft.net> | 2016-10-06 21:08:13 -0400 |
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committer | David S. Miller <davem@davemloft.net> | 2016-10-06 21:08:13 -0400 |
commit | a0ec9319f429c261346038d4d54239aa80a5e289 (patch) | |
tree | 4f341218d5234cfed499dc45da0ea69ee37e6cc3 | |
parent | 0d818c288974e6f80923775dbf6225e3cb66659c (diff) | |
parent | 3a09f18ef6f685c714f1c5a22df9b4da58dde355 (diff) | |
download | op-kernel-dev-a0ec9319f429c261346038d4d54239aa80a5e289.zip op-kernel-dev-a0ec9319f429c261346038d4d54239aa80a5e289.tar.gz |
Merge branch 'mediatek-hw-lro-chip-id-check'
Nelson Chang says:
====================
net: ethernet: mediatek: check the hw lro capability by the chip id instead of the dtsi
The series modify to check if hw lro is supported by the chip id.
changes since v3:
- Refine mtk_is_hwlro_supported() function
changes since v2:
- Refine mtk_get_chip_id() function
changes since v1:
- Because hw lro started to be supported from MT7623, the proper way to check if the feature is capable is to judge by the chip id instead of by the dtsi.
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | Documentation/devicetree/bindings/net/mediatek-net.txt | 2 | ||||
-rw-r--r-- | drivers/net/ethernet/mediatek/mtk_eth_soc.c | 43 | ||||
-rw-r--r-- | drivers/net/ethernet/mediatek/mtk_eth_soc.h | 6 |
3 files changed, 47 insertions, 4 deletions
diff --git a/Documentation/devicetree/bindings/net/mediatek-net.txt b/Documentation/devicetree/bindings/net/mediatek-net.txt index f095257..c010faf 100644 --- a/Documentation/devicetree/bindings/net/mediatek-net.txt +++ b/Documentation/devicetree/bindings/net/mediatek-net.txt @@ -24,7 +24,6 @@ Required properties: Optional properties: - interrupt-parent: Should be the phandle for the interrupt controller that services interrupts for this device -- mediatek,hwlro: the capability if the hardware supports LRO functions * Ethernet MAC node @@ -54,7 +53,6 @@ eth: ethernet@1b100000 { reset-names = "eth"; mediatek,ethsys = <ðsys>; mediatek,pctl = <&syscfg_pctl_a>; - mediatek,hwlro; #address-cells = <1>; #size-cells = <0>; diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.c b/drivers/net/ethernet/mediatek/mtk_eth_soc.c index ad4ab97..4a62ffd 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.c +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.c @@ -2323,6 +2323,41 @@ free_netdev: return err; } +static int mtk_get_chip_id(struct mtk_eth *eth, u32 *chip_id) +{ + u32 val[2], id[4]; + + regmap_read(eth->ethsys, ETHSYS_CHIPID0_3, &val[0]); + regmap_read(eth->ethsys, ETHSYS_CHIPID4_7, &val[1]); + + id[3] = ((val[0] >> 16) & 0xff) - '0'; + id[2] = ((val[0] >> 24) & 0xff) - '0'; + id[1] = (val[1] & 0xff) - '0'; + id[0] = ((val[1] >> 8) & 0xff) - '0'; + + *chip_id = (id[3] * 1000) + (id[2] * 100) + + (id[1] * 10) + id[0]; + + if (!(*chip_id)) { + dev_err(eth->dev, "failed to get chip id\n"); + return -ENODEV; + } + + dev_info(eth->dev, "chip id = %d\n", *chip_id); + + return 0; +} + +static bool mtk_is_hwlro_supported(struct mtk_eth *eth) +{ + switch (eth->chip_id) { + case MT7623_ETH: + return true; + } + + return false; +} + static int mtk_probe(struct platform_device *pdev) { struct resource *res = platform_get_resource(pdev, IORESOURCE_MEM, 0); @@ -2362,8 +2397,6 @@ static int mtk_probe(struct platform_device *pdev) return PTR_ERR(eth->pctl); } - eth->hwlro = of_property_read_bool(pdev->dev.of_node, "mediatek,hwlro"); - for (i = 0; i < 3; i++) { eth->irq[i] = platform_get_irq(pdev, i); if (eth->irq[i] < 0) { @@ -2388,6 +2421,12 @@ static int mtk_probe(struct platform_device *pdev) if (err) return err; + err = mtk_get_chip_id(eth, ð->chip_id); + if (err) + return err; + + eth->hwlro = mtk_is_hwlro_supported(eth); + for_each_child_of_node(pdev->dev.of_node, mac_np) { if (!of_device_is_compatible(mac_np, "mediatek,eth-mac")) diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h b/drivers/net/ethernet/mediatek/mtk_eth_soc.h index 3003195..99b1c8e 100644 --- a/drivers/net/ethernet/mediatek/mtk_eth_soc.h +++ b/drivers/net/ethernet/mediatek/mtk_eth_soc.h @@ -342,6 +342,11 @@ #define GPIO_BIAS_CTRL 0xed0 #define GPIO_DRV_SEL10 0xf00 +/* ethernet subsystem chip id register */ +#define ETHSYS_CHIPID0_3 0x0 +#define ETHSYS_CHIPID4_7 0x4 +#define MT7623_ETH 7623 + /* ethernet subsystem config register */ #define ETHSYS_SYSCFG0 0x14 #define SYSCFG0_GE_MASK 0x3 @@ -534,6 +539,7 @@ struct mtk_eth { unsigned long sysclk; struct regmap *ethsys; struct regmap *pctl; + u32 chip_id; bool hwlro; atomic_t dma_refcnt; struct mtk_tx_ring tx_ring; |