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author | Shiraz Hashim <shiraz.hashim@st.com> | 2012-07-07 18:01:07 -0700 |
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committer | Dmitry Torokhov <dmitry.torokhov@gmail.com> | 2012-07-07 18:01:55 -0700 |
commit | 98e4d4d6bcf130cbf5a684c4f98c345f13e2f28c (patch) | |
tree | 350634dcf4980202aa76f91cfc2c3264f2a1d51e | |
parent | f6f2efa35f6b76034e5a31a075218feaa10f1812 (diff) | |
download | op-kernel-dev-98e4d4d6bcf130cbf5a684c4f98c345f13e2f28c.zip op-kernel-dev-98e4d4d6bcf130cbf5a684c4f98c345f13e2f28c.tar.gz |
Input: spear_keyboard - generalize keyboard frequency configuration
Current implementation hard coded keyboard frequency configuration
assuming input clock as fixed APB (83 MHz). Generalize the configuration
using clock framework APIs.
Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com>
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
-rw-r--r-- | drivers/input/keyboard/spear-keyboard.c | 13 |
1 files changed, 7 insertions, 6 deletions
diff --git a/drivers/input/keyboard/spear-keyboard.c b/drivers/input/keyboard/spear-keyboard.c index a51cdc7..c499387 100644 --- a/drivers/input/keyboard/spear-keyboard.c +++ b/drivers/input/keyboard/spear-keyboard.c @@ -33,13 +33,10 @@ #define INTR_MASK 0x54 /* Register Values */ -/* - * pclk freq mask = (APB FEQ -1)= 82 MHZ.Programme bit 15-9 in mode - * control register as 1010010(82MHZ) - */ -#define PCLK_FREQ_MSK 0xA400 /* 82 MHz */ #define NUM_ROWS 16 #define NUM_COLS 16 +#define MODE_CTL_PCLK_FREQ_SHIFT 9 +#define MODE_CTL_PCLK_FREQ_MSK 0x7F #define MODE_CTL_KEYBOARD (0x2 << 0) #define MODE_CTL_SCAN_RATE_10 (0x0 << 2) @@ -113,8 +110,12 @@ static int spear_kbd_open(struct input_dev *dev) if (error) return error; + /* keyboard rate to be programmed is input clock (in MHz) - 1 */ + val = clk_get_rate(kbd->clk) / 1000000 - 1; + val = (val & MODE_CTL_PCLK_FREQ_MSK) << MODE_CTL_PCLK_FREQ_SHIFT; + /* program keyboard */ - val = MODE_CTL_SCAN_RATE_80 | MODE_CTL_KEYBOARD | PCLK_FREQ_MSK | + val = MODE_CTL_SCAN_RATE_80 | MODE_CTL_KEYBOARD | val | (kbd->mode << MODE_CTL_KEYNUM_SHIFT); writel_relaxed(val, kbd->io_base + MODE_CTL_REG); writel_relaxed(1, kbd->io_base + STATUS_REG); |