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authorHauke Mehrtens <hauke@hauke-m.de>2013-09-18 13:33:00 +0200
committerRalf Baechle <ralf@linux-mips.org>2013-10-29 21:24:09 +0100
commit8eae19ccaeb5f519fc413c9646398a77dfbfa201 (patch)
tree14628746c7eb3d3dc3dc410f1a741668f929b10d
parent2224de9d152b6fd9faa0df49cf55ca97eab772fa (diff)
downloadop-kernel-dev-8eae19ccaeb5f519fc413c9646398a77dfbfa201.zip
op-kernel-dev-8eae19ccaeb5f519fc413c9646398a77dfbfa201.tar.gz
MIPS: BCM47XX: Fix detected clock on Asus WL520GC and WL520GU
The Asus WL520GC and WL520GU are based on the BCM5354 and clocked at 200MHz, but they do not have a clkfreq nvram variable set to the correct value. This adds a workaround for these devices. Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5843/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
-rw-r--r--arch/mips/bcm47xx/time.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/mips/bcm47xx/time.c b/arch/mips/bcm47xx/time.c
index 5e5d797..2c85d92 100644
--- a/arch/mips/bcm47xx/time.c
+++ b/arch/mips/bcm47xx/time.c
@@ -28,6 +28,7 @@
#include <asm/time.h>
#include <bcm47xx.h>
#include <bcm47xx_nvram.h>
+#include <bcm47xx_board.h>
void __init plat_time_init(void)
{
@@ -35,6 +36,7 @@ void __init plat_time_init(void)
u16 chip_id = 0;
char buf[10];
int len;
+ enum bcm47xx_board board = bcm47xx_board_get();
/*
* Use deterministic values for initial counter interrupt
@@ -64,6 +66,15 @@ void __init plat_time_init(void)
hz = 100000000;
}
+ switch (board) {
+ case BCM47XX_BOARD_ASUS_WL520GC:
+ case BCM47XX_BOARD_ASUS_WL520GU:
+ hz = 100000000;
+ break;
+ default:
+ break;
+ }
+
if (!hz)
hz = 100000000;
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