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| author | Will Deacon <will.deacon@arm.com> | 2016-09-06 14:04:45 +0100 |
|---|---|---|
| committer | Will Deacon <will.deacon@arm.com> | 2016-09-09 18:12:08 +0100 |
| commit | 8a71f0c656e0521867931eecff54eb3a35ca65a7 (patch) | |
| tree | 4c460a0145d2a9a1c2a70b93ceb294a2c7280ac7 | |
| parent | 0e27a7fce60f8c334ef59de0fbf5df8744e752e0 (diff) | |
| download | op-kernel-dev-8a71f0c656e0521867931eecff54eb3a35ca65a7.zip op-kernel-dev-8a71f0c656e0521867931eecff54eb3a35ca65a7.tar.gz | |
arm64: sysreg: replace open-coded mrs_s/msr_s with {read,write}_sysreg_s
Similar to our {read,write}_sysreg accessors for architected, named
system registers, this patch introduces {read,write}_sysreg_s variants
that can take arbitrary sys_reg output and therefore access IMPDEF
registers or registers that unsupported by binutils.
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
| -rw-r--r-- | arch/arm64/include/asm/cputype.h | 6 | ||||
| -rw-r--r-- | arch/arm64/include/asm/sysreg.h | 15 |
2 files changed, 16 insertions, 5 deletions
diff --git a/arch/arm64/include/asm/cputype.h b/arch/arm64/include/asm/cputype.h index 9d9fd4b..26a68dd 100644 --- a/arch/arm64/include/asm/cputype.h +++ b/arch/arm64/include/asm/cputype.h @@ -93,11 +93,7 @@ #include <asm/sysreg.h> -#define read_cpuid(reg) ({ \ - u64 __val; \ - asm("mrs_s %0, " __stringify(SYS_ ## reg) : "=r" (__val)); \ - __val; \ -}) +#define read_cpuid(reg) read_sysreg_s(SYS_ ## reg) /* * The CPU ID never changes at run time, so we might as well tell the diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 7e4ecd1..e8d46e8 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -274,6 +274,21 @@ asm( : : "rZ" (__val)); \ } while (0) +/* + * For registers without architectural names, or simply unsupported by + * GAS. + */ +#define read_sysreg_s(r) ({ \ + u64 __val; \ + asm volatile("mrs_s %0, " __stringify(r) : "=r" (__val)); \ + __val; \ +}) + +#define write_sysreg_s(v, r) do { \ + u64 __val = (u64)v; \ + asm volatile("msr_s " __stringify(r) ", %0" : : "rZ" (__val)); \ +} while (0) + static inline void config_sctlr_el1(u32 clear, u32 set) { u32 val; |
