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| author | Eric Anholt <eric@anholt.net> | 2010-07-26 14:49:07 -0700 |
|---|---|---|
| committer | Eric Anholt <eric@anholt.net> | 2010-08-03 16:23:58 -0700 |
| commit | 7b824ec2e5d7d086264ecae51e30e3c5e00cdecc (patch) | |
| tree | f52e8a3f04f5651efa9ec8dc354b9804ce23dc67 | |
| parent | d1d6ca73ef548748e141747e7260798327d6a2c1 (diff) | |
| download | op-kernel-dev-7b824ec2e5d7d086264ecae51e30e3c5e00cdecc.zip op-kernel-dev-7b824ec2e5d7d086264ecae51e30e3c5e00cdecc.tar.gz | |
drm/i915: Clear the Ironlake dithering flags when the pipe doesn't want it.
My fine DisplayPort output was getting ST dithering forever after
having had the LVDS enabled at one point.
Signed-off-by: Eric Anholt <eric@anholt.net>
| -rw-r--r-- | drivers/gpu/drm/i915/intel_display.c | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index ca3b8a8..ae17185 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3888,6 +3888,11 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, udelay(150); } + if (HAS_PCH_SPLIT(dev)) { + pipeconf &= ~PIPE_ENABLE_DITHER; + pipeconf &= ~PIPE_DITHER_TYPE_MASK; + } + /* The LVDS pin pair needs to be on before the DPLLs are enabled. * This is an exception to the general rule that mode_set doesn't turn * things on. @@ -3930,16 +3935,13 @@ static int intel_crtc_mode_set(struct drm_crtc *crtc, if (dev_priv->lvds_dither) { if (HAS_PCH_SPLIT(dev)) { pipeconf |= PIPE_ENABLE_DITHER; - pipeconf &= ~PIPE_DITHER_TYPE_MASK; pipeconf |= PIPE_DITHER_TYPE_ST01; } else lvds |= LVDS_ENABLE_DITHER; } else { - if (HAS_PCH_SPLIT(dev)) { - pipeconf &= ~PIPE_ENABLE_DITHER; - pipeconf &= ~PIPE_DITHER_TYPE_MASK; - } else + if (!HAS_PCH_SPLIT(dev)) { lvds &= ~LVDS_ENABLE_DITHER; + } } } I915_WRITE(lvds_reg, lvds); |
