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| author | Ben Skeggs <bskeggs@redhat.com> | 2018-05-08 20:39:47 +1000 |
|---|---|---|
| committer | Ben Skeggs <bskeggs@redhat.com> | 2018-05-18 15:01:25 +1000 |
| commit | 74b6068bd660a806e801ae039dbab58dc284301e (patch) | |
| tree | 6b36ec0dd8112e1e3ef99f81f81d7c7f19709d42 | |
| parent | 201ed6f651e72d886d9066237a830aa49d2ffcd1 (diff) | |
| download | op-kernel-dev-74b6068bd660a806e801ae039dbab58dc284301e.zip op-kernel-dev-74b6068bd660a806e801ae039dbab58dc284301e.tar.gz | |
drm/nouveau/gr/gf100-: add missing reset sequence before golden context init
RM and NVGPU both have a variant of this, we probably should too.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
| -rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c | 20 |
1 files changed, 20 insertions, 0 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c index 5560376..4c25389 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c @@ -1456,6 +1456,26 @@ gf100_grctx_generate(struct gf100_gr *gr) int ret, i; u64 addr; + /* NV_PGRAPH_FE_PWR_MODE_FORCE_ON. */ + nvkm_wr32(device, 0x404170, 0x00000012); + nvkm_msec(device, 2000, + if (!(nvkm_rd32(device, 0x404170) & 0x00000010)) + break; + ); + + /* Reset FECS. */ + nvkm_wr32(device, 0x409614, 0x00000070); + nvkm_usec(device, 10, NVKM_DELAY); + nvkm_mask(device, 0x409614, 0x00000700, 0x00000700); + nvkm_usec(device, 10, NVKM_DELAY); + nvkm_rd32(device, 0x409614); + + /* NV_PGRAPH_FE_PWR_MODE_AUTO. */ + nvkm_wr32(device, 0x404170, 0x00000010); + + /* Init SCC RAM. */ + nvkm_wr32(device, 0x40802c, 0x00000001); + /* Allocate memory to for a "channel", which we'll use to generate * the default context values. */ |
