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| author | Will Deacon <will.deacon@arm.com> | 2018-02-05 15:34:16 +0000 |
|---|---|---|
| committer | Catalin Marinas <catalin.marinas@arm.com> | 2018-02-06 22:53:28 +0000 |
| commit | 669474e772b952b14f4de4845a1558fd4c0414a4 (patch) | |
| tree | 95e11d01c1c6eb07b25fbc271dc90222718a3c8e | |
| parent | 439e70e27a51fe374806f460848066b237b0c10b (diff) | |
| download | op-kernel-dev-669474e772b952b14f4de4845a1558fd4c0414a4.zip op-kernel-dev-669474e772b952b14f4de4845a1558fd4c0414a4.tar.gz | |
arm64: barrier: Add CSDB macros to control data-value prediction
For CPUs capable of data value prediction, CSDB waits for any outstanding
predictions to architecturally resolve before allowing speculative execution
to continue. Provide macros to expose it to the arch code.
Reviewed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
| -rw-r--r-- | arch/arm64/include/asm/assembler.h | 7 | ||||
| -rw-r--r-- | arch/arm64/include/asm/barrier.h | 1 |
2 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h index 544878a..1f44b42 100644 --- a/arch/arm64/include/asm/assembler.h +++ b/arch/arm64/include/asm/assembler.h @@ -116,6 +116,13 @@ .endm /* + * Value prediction barrier + */ + .macro csdb + hint #20 + .endm + +/* * NOP sequence */ .macro nops, num diff --git a/arch/arm64/include/asm/barrier.h b/arch/arm64/include/asm/barrier.h index 77651c4..c0a846d 100644 --- a/arch/arm64/include/asm/barrier.h +++ b/arch/arm64/include/asm/barrier.h @@ -32,6 +32,7 @@ #define dsb(opt) asm volatile("dsb " #opt : : : "memory") #define psb_csync() asm volatile("hint #17" : : : "memory") +#define csdb() asm volatile("hint #20" : : : "memory") #define mb() dsb(sy) #define rmb() dsb(ld) |
