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authorMichel Dänzer <michel.daenzer@amd.com>2018-06-21 11:27:46 +0200
committerTimothy Pearson <tpearson@raptorengineering.com>2018-06-23 16:29:47 -0500
commit4c396ffb1f22d50e21517c43f75fcc680f0503a9 (patch)
tree911153208a0ca5130b65c4cdafe35c3aef87111a
parent578e2d761554130f7c6abfe821c2509912a00ac6 (diff)
downloadop-kernel-dev-4c396ffb1f22d50e21517c43f75fcc680f0503a9.zip
op-kernel-dev-4c396ffb1f22d50e21517c43f75fcc680f0503a9.tar.gz
drm/amdgpu: GPU vs CPU page size fixes in amdgpu_vm_bo_split_mapping
start / last / max_entries are numbers of GPU pages, pfn / count are numbers of CPU pages.
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
index b0eb2f5..edf16b2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
@@ -1463,7 +1463,9 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
uint64_t count;
max_entries = min(max_entries, 16ull * 1024ull);
- for (count = 1; count < max_entries; ++count) {
+ for (count = 1;
+ count < max_entries / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
+ ++count) {
uint64_t idx = pfn + count;
if (pages_addr[idx] !=
@@ -1476,7 +1478,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
dma_addr = pages_addr;
} else {
addr = pages_addr[pfn];
- max_entries = count;
+ max_entries = count * (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
}
} else if (flags & AMDGPU_PTE_VALID) {
@@ -1491,7 +1493,7 @@ static int amdgpu_vm_bo_split_mapping(struct amdgpu_device *adev,
if (r)
return r;
- pfn += last - start + 1;
+ pfn += (last - start + 1) / (PAGE_SIZE / AMDGPU_GPU_PAGE_SIZE);
if (nodes && nodes->size == pfn) {
pfn = 0;
++nodes;
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