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authorSteven A. Falco <sfalco@harris.com>2009-04-27 17:10:10 -0400
committerDavid Woodhouse <David.Woodhouse@intel.com>2009-04-29 06:49:28 +0100
commit3f33b0aaac4e208579fe5aa2964857d4e9ba10c5 (patch)
treed63af4077e9f102a39c0f2d035f72dfa5fb7c1fc
parente7693548950ea5801d5d8b00414aed37033cf972 (diff)
downloadop-kernel-dev-3f33b0aaac4e208579fe5aa2964857d4e9ba10c5.zip
op-kernel-dev-3f33b0aaac4e208579fe5aa2964857d4e9ba10c5.tar.gz
mtd: Bug in m25p80.c during whole-chip erase
There is a logic error in "whole chip erase" for the m25p80 family. If the whole device is successfully erased, erase_chip() will return 0, and the code will fall through to the "else" clause, and do sector-by-sector erase in addition to the whole-chip erase. This patch corrects that. Also, the MAX_READY_WAIT_COUNT is insufficient for an m25p16 connected to a 400 MHz powerpc. Increasing it allows me to successfully program the device on my board. Signed-off-by: Steven A. Falco <sfalco@harris.com> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
-rw-r--r--drivers/mtd/devices/m25p80.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/drivers/mtd/devices/m25p80.c b/drivers/mtd/devices/m25p80.c
index 8185b1f..dfadef8 100644
--- a/drivers/mtd/devices/m25p80.c
+++ b/drivers/mtd/devices/m25p80.c
@@ -54,7 +54,7 @@
#define SR_SRWD 0x80 /* SR write protect */
/* Define max times to check status register before we give up. */
-#define MAX_READY_WAIT_COUNT 100000
+#define MAX_READY_WAIT_COUNT 1000000
#define CMD_SIZE 4
#ifdef CONFIG_M25PXX_USE_FAST_READ
@@ -246,10 +246,12 @@ static int m25p80_erase(struct mtd_info *mtd, struct erase_info *instr)
mutex_lock(&flash->lock);
/* whole-chip erase? */
- if (len == flash->mtd.size && erase_chip(flash)) {
- instr->state = MTD_ERASE_FAILED;
- mutex_unlock(&flash->lock);
- return -EIO;
+ if (len == flash->mtd.size) {
+ if (erase_chip(flash)) {
+ instr->state = MTD_ERASE_FAILED;
+ mutex_unlock(&flash->lock);
+ return -EIO;
+ }
/* REVISIT in some cases we could speed up erasing large regions
* by using OPCODE_SE instead of OPCODE_BE_4K. We may have set up
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