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author | Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> | 2015-10-22 02:05:19 +0300 |
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committer | Simon Horman <horms+renesas@verge.net.au> | 2015-10-23 09:19:56 +0900 |
commit | 1329f6d0f6a502089ed00038493985f2a4d97006 (patch) | |
tree | 84e76f1e83d8d3932497ffe4e3f38a7042779fd6 | |
parent | 56a2182f6ada123759041bf28d066bb509fe358b (diff) | |
download | op-kernel-dev-1329f6d0f6a502089ed00038493985f2a4d97006.zip op-kernel-dev-1329f6d0f6a502089ed00038493985f2a4d97006.tar.gz |
ARM: shmobile: r8a7791: fix "gpio-ranges" props
On R8A7791, GPIO banks 1 and 7 are missing pins 26 to 31. Correct the
"gpio-ranges" properties of the GPIO1 node (GPIO7 is already correct).
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
-rw-r--r-- | arch/arm/boot/dts/r8a7791.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/r8a7791.dtsi b/arch/arm/boot/dts/r8a7791.dtsi index 57029d3..2bc54e3 100644 --- a/arch/arm/boot/dts/r8a7791.dtsi +++ b/arch/arm/boot/dts/r8a7791.dtsi @@ -100,7 +100,7 @@ interrupts = <0 5 IRQ_TYPE_LEVEL_HIGH>; #gpio-cells = <2>; gpio-controller; - gpio-ranges = <&pfc 0 32 32>; + gpio-ranges = <&pfc 0 32 26>; #interrupt-cells = <2>; interrupt-controller; clocks = <&mstp9_clks R8A7791_CLK_GPIO1>; |