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authorKumar Gala <galak@freescale.com>2005-07-27 11:44:10 -0700
committerLinus Torvalds <torvalds@g5.osdl.org>2005-07-27 16:25:56 -0700
commit127384524b31d99bc3f9e2d2e7af4a5fad572235 (patch)
tree2557085e771896c1d6ac00626972008a3406459a
parentc41b72d5bd590e6ff781d6bdfc71595f3996bacf (diff)
downloadop-kernel-dev-127384524b31d99bc3f9e2d2e7af4a5fad572235.zip
op-kernel-dev-127384524b31d99bc3f9e2d2e7af4a5fad572235.tar.gz
[PATCH] ppc32: Fix typo in setup of 2nd PCI bus on 85xx
Typo bug that was using PCI1 defines instead of PCI2 when setting up the second PCI bus controller on 85xx based systems. This hasn't been a real issue since currently the PCI2 sizes are the same as the PCI1 sizes for currently supported boards. Thanks to Andrew Klossner @ Xerox for point this out. Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
-rw-r--r--arch/ppc/syslib/ppc85xx_setup.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/ppc/syslib/ppc85xx_setup.c b/arch/ppc/syslib/ppc85xx_setup.c
index ca95d79..b7242f1 100644
--- a/arch/ppc/syslib/ppc85xx_setup.c
+++ b/arch/ppc/syslib/ppc85xx_setup.c
@@ -233,14 +233,14 @@ mpc85xx_setup_pci2(struct pci_controller *hose)
pci->powbar1 = (MPC85XX_PCI2_LOWER_MEM >> 12) & 0x000fffff;
/* Enable, Mem R/W */
pci->powar1 = 0x80044000 |
- (__ilog2(MPC85XX_PCI1_UPPER_MEM - MPC85XX_PCI1_LOWER_MEM + 1) - 1);
+ (__ilog2(MPC85XX_PCI2_UPPER_MEM - MPC85XX_PCI2_LOWER_MEM + 1) - 1);
/* Setup outboud IO windows @ MPC85XX_PCI2_IO_BASE */
pci->potar2 = 0x00000000;
pci->potear2 = 0x00000000;
pci->powbar2 = (MPC85XX_PCI2_IO_BASE >> 12) & 0x000fffff;
/* Enable, IO R/W */
- pci->powar2 = 0x80088000 | (__ilog2(MPC85XX_PCI1_IO_SIZE) - 1);
+ pci->powar2 = 0x80088000 | (__ilog2(MPC85XX_PCI2_IO_SIZE) - 1);
/* Setup 2G inbound Memory Window @ 0 */
pci->pitar1 = 0x00000000;
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