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authorNicolas Pitre <nicolas.pitre@linaro.org>2012-05-02 20:56:52 -0400
committerNicolas Pitre <nicolas.pitre@linaro.org>2013-05-29 15:50:34 -0400
commit1e904e1bf6f1285cc2dd5696c44b7cf78cda643f (patch)
tree960d3d6b28b2a6097da4806b1059f55d4fa263ad /.gitignore
parentbbc8d77db655be61a21d7623428c46c578a866d3 (diff)
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ARM: vexpress: introduce DCSCB support
This adds basic CPU and cluster reset controls on RTSM for the A15x4-A7x4 model configuration using the Dual Cluster System Configuration Block (DCSCB). The cache coherency interconnect (CCI) is not handled yet. Signed-off-by: Nicolas Pitre <nico@linaro.org> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Acked-by: Pawel Moll <pawel.moll@arm.com>
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