From 03fc0548b70393b0c8d43703591a9e34fb8e3123 Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 28 Mar 2013 05:37:51 +0000 Subject: tci: Use 32-bit signed offsets to loads/stores Since the change to tcg_exit_req, the first insn of every TB is a load with a negative offset from env. Signed-off-by: Richard Henderson Signed-off by: Stefan Weil --- tcg/tci/tcg-target.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'tcg') diff --git a/tcg/tci/tcg-target.c b/tcg/tci/tcg-target.c index 2d561b3..a85095c 100644 --- a/tcg/tci/tcg-target.c +++ b/tcg/tci/tcg-target.c @@ -513,7 +513,7 @@ static void tcg_out_ld(TCGContext *s, TCGType type, TCGReg ret, TCGReg arg1, tcg_out_op_t(s, INDEX_op_ld_i64); tcg_out_r(s, ret); tcg_out_r(s, arg1); - assert(arg2 == (uint32_t)arg2); + assert(arg2 == (int32_t)arg2); tcg_out32(s, arg2); #else TODO(); @@ -636,7 +636,7 @@ static void tcg_out_op(TCGContext *s, TCGOpcode opc, const TCGArg *args, case INDEX_op_st_i64: tcg_out_r(s, args[0]); tcg_out_r(s, args[1]); - assert(args[2] == (uint32_t)args[2]); + assert(args[2] == (int32_t)args[2]); tcg_out32(s, args[2]); break; case INDEX_op_add_i32: -- cgit v1.1 From 4699ca6dbf335b0c38e291a530c6ad85e599253d Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 28 Mar 2013 05:37:54 +0000 Subject: tci: Delete unused tb_ret_addr Signed-off-by: Richard Henderson Signed-off by: Stefan Weil --- tcg/tci/tcg-target.c | 6 +----- 1 file changed, 1 insertion(+), 5 deletions(-) (limited to 'tcg') diff --git a/tcg/tci/tcg-target.c b/tcg/tci/tcg-target.c index a85095c..b096a84 100644 --- a/tcg/tci/tcg-target.c +++ b/tcg/tci/tcg-target.c @@ -45,9 +45,6 @@ #define TCG_TARGET_STACK_ALIGN 16 #define TCG_TARGET_CALL_STACK_OFFSET 0 -/* TODO: documentation. */ -static uint8_t *tb_ret_addr; - /* Macros used in tcg_target_op_defs. */ #define R "r" #define RI "ri" @@ -912,7 +909,6 @@ static void tcg_target_init(TCGContext *s) } /* Generate global QEMU prologue and epilogue code. */ -static void tcg_target_qemu_prologue(TCGContext *s) +static inline void tcg_target_qemu_prologue(TCGContext *s) { - tb_ret_addr = s->code_ptr; } -- cgit v1.1 From ee79c356ffe18eea90ea4bbde2057cebe6bb654f Mon Sep 17 00:00:00 2001 From: Richard Henderson Date: Thu, 28 Mar 2013 05:37:55 +0000 Subject: tci: Make tcg temporaries local to tcg_qemu_tb_exec We're moving away from the temporaries stored in env. Make sure we can differentiate between temp stores and possibly bogus stores for extra call arguments. Move TCG_AREG0 and TCG_REG_CALL_STACK out of the way of the parameter passing registers. Signed-off-by: Richard Henderson Signed-off by: Stefan Weil --- tcg/tci/tcg-target.c | 12 ++++++------ tcg/tci/tcg-target.h | 8 +++++++- 2 files changed, 13 insertions(+), 7 deletions(-) (limited to 'tcg') diff --git a/tcg/tci/tcg-target.c b/tcg/tci/tcg-target.c index b096a84..d1241b5 100644 --- a/tcg/tci/tcg-target.c +++ b/tcg/tci/tcg-target.c @@ -40,11 +40,6 @@ /* Bitfield n...m (in 32 bit value). */ #define BITS(n, m) (((0xffffffffU << (31 - n)) >> (31 - n + m)) << m) -/* Used for function call generation. */ -#define TCG_REG_CALL_STACK TCG_REG_R4 -#define TCG_TARGET_STACK_ALIGN 16 -#define TCG_TARGET_CALL_STACK_OFFSET 0 - /* Macros used in tcg_target_op_defs. */ #define R "r" #define RI "ri" @@ -901,10 +896,15 @@ static void tcg_target_init(TCGContext *s) /* TODO: Which registers should be set here? */ tcg_regset_set32(tcg_target_call_clobber_regs, 0, BIT(TCG_TARGET_NB_REGS) - 1); + tcg_regset_clear(s->reserved_regs); tcg_regset_set_reg(s->reserved_regs, TCG_REG_CALL_STACK); tcg_add_target_add_op_defs(tcg_target_op_defs); - tcg_set_frame(s, TCG_AREG0, offsetof(CPUArchState, temp_buf), + + /* We use negative offsets from "sp" so that we can distinguish + stores that might pretend to be call arguments. */ + tcg_set_frame(s, TCG_REG_CALL_STACK, + -CPU_TEMP_BUF_NLONGS * sizeof(long), CPU_TEMP_BUF_NLONGS * sizeof(long)); } diff --git a/tcg/tci/tcg-target.h b/tcg/tci/tcg-target.h index 1f17576..0395bbb 100644 --- a/tcg/tci/tcg-target.h +++ b/tcg/tci/tcg-target.h @@ -127,7 +127,6 @@ typedef enum { TCG_REG_R5, TCG_REG_R6, TCG_REG_R7, - TCG_AREG0 = TCG_REG_R7, #if TCG_TARGET_NB_REGS >= 16 TCG_REG_R8, TCG_REG_R9, @@ -160,6 +159,13 @@ typedef enum { TCG_CONST = UINT8_MAX } TCGReg; +#define TCG_AREG0 (TCG_TARGET_NB_REGS - 2) + +/* Used for function call generation. */ +#define TCG_REG_CALL_STACK (TCG_TARGET_NB_REGS - 1) +#define TCG_TARGET_CALL_STACK_OFFSET 0 +#define TCG_TARGET_STACK_ALIGN 16 + void tci_disas(uint8_t opc); tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr); -- cgit v1.1