From 3580ecad0acf25a28464c145f2c74a929d0e57b1 Mon Sep 17 00:00:00 2001 From: Max Filippov Date: Tue, 6 Sep 2011 03:55:35 +0400 Subject: target-xtensa: implement shifts (ST1 and RST1 groups) - ST1: SAR (shift amount special register) manipulation, NSA(U); - RST1: shifts, 16-bit multiplication. Signed-off-by: Max Filippov Signed-off-by: Blue Swirl --- target-xtensa/op_helper.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) (limited to 'target-xtensa/op_helper.c') diff --git a/target-xtensa/op_helper.c b/target-xtensa/op_helper.c index 0392fbe..c1cfd2e 100644 --- a/target-xtensa/op_helper.c +++ b/target-xtensa/op_helper.c @@ -28,6 +28,7 @@ #include "cpu.h" #include "dyngen-exec.h" #include "helpers.h" +#include "host-utils.h" #define MMUSUFFIX _mmu @@ -57,3 +58,16 @@ void HELPER(exception)(uint32_t excp) env->exception_index = excp; cpu_loop_exit(env); } + +uint32_t HELPER(nsa)(uint32_t v) +{ + if (v & 0x80000000) { + v = ~v; + } + return v ? clz32(v) - 1 : 31; +} + +uint32_t HELPER(nsau)(uint32_t v) +{ + return v ? clz32(v) : 32; +} -- cgit v1.1