From e5c96c82bc529674b61eacd221734abc2674e264 Mon Sep 17 00:00:00 2001
From: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Date: Thu, 7 May 2015 19:55:37 +0200
Subject: target-tricore: add RR_CRC32 instruction of the v1.6.1 ISA

This instruction was introduced by the new Aurix platform.

Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de>
Reviewed-by: Richard Henderson <rth@twiddle.net>
---
 target-tricore/tricore-opcodes.h | 1 +
 1 file changed, 1 insertion(+)

(limited to 'target-tricore/tricore-opcodes.h')

diff --git a/target-tricore/tricore-opcodes.h b/target-tricore/tricore-opcodes.h
index 7ad6df9..440c7fe 100644
--- a/target-tricore/tricore-opcodes.h
+++ b/target-tricore/tricore-opcodes.h
@@ -1120,6 +1120,7 @@ enum {
     OPC2_32_RR_DVINIT_U                          = 0x0a,
     OPC2_32_RR_PARITY                            = 0x02,
     OPC2_32_RR_UNPACK                            = 0x08,
+    OPC2_32_RR_CRC32                             = 0x03,
 };
 /* OPCM_32_RR_IDIRECT                               */
 enum {
-- 
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