From f3659eee05793aede68b1791465fb2b0767bc1f2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Andreas=20F=C3=A4rber?= Date: Thu, 27 Jun 2013 19:09:09 +0200 Subject: cpu: Introduce CPUClass::memory_rw_debug() for target_memory_rw_debug() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make inline target_memory_rw_debug() always available and change its argument to CPUState. Let it check if CPUClass::memory_rw_debug provides a specialized callback and fall back to cpu_memory_rw_debug() otherwise. The only overriding implementation is for 32-bit sparc. This prepares for changing GDBState::g_cpu to CPUState. Signed-off-by: Andreas Färber --- target-sparc/cpu.c | 3 +++ 1 file changed, 3 insertions(+) (limited to 'target-sparc/cpu.c') diff --git a/target-sparc/cpu.c b/target-sparc/cpu.c index 12494cc..d1d0339 100644 --- a/target-sparc/cpu.c +++ b/target-sparc/cpu.c @@ -782,6 +782,9 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) cc->do_interrupt = sparc_cpu_do_interrupt; cc->dump_state = sparc_cpu_dump_state; +#if !defined(TARGET_SPARC64) && !defined(CONFIG_USER_ONLY) + cc->memory_rw_debug = sparc_cpu_memory_rw_debug; +#endif cc->set_pc = sparc_cpu_set_pc; cc->synchronize_from_tb = sparc_cpu_synchronize_from_tb; #ifndef CONFIG_USER_ONLY -- cgit v1.1