From c2432a42fe13c3c6774f5443ac8f6f7261fe91d1 Mon Sep 17 00:00:00 2001 From: aurel32 Date: Sat, 7 Feb 2009 15:18:14 +0000 Subject: SH7750/51: add register BCR3, BCR4, PCR, RTCOR, RTCNT, RTCSR, SDMR2, SDMR3 and fix BCR2 support Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD Signed-off-by: Aurelien Jarno git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6548 c046a42c-6fe2-441c-8c8c-71466251a162 --- target-sh4/cpu.h | 1 + target-sh4/translate.c | 2 ++ 2 files changed, 3 insertions(+) (limited to 'target-sh4') diff --git a/target-sh4/cpu.h b/target-sh4/cpu.h index 623eacc..86a4a6b 100644 --- a/target-sh4/cpu.h +++ b/target-sh4/cpu.h @@ -95,6 +95,7 @@ typedef struct tlb_t { enum sh_features { SH_FEATURE_SH4A = 1, + SH_FEATURE_BCR3_AND_BCR4 = 2, }; typedef struct CPUSH4State { diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 80ea851..a0ee4f1 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -222,12 +222,14 @@ static sh4_def_t sh4_defs[] = { .pvr = 0x00050000, .prr = 0x00000100, .cvr = 0x00110000, + .features = SH_FEATURE_BCR3_AND_BCR4, }, { .name = "SH7751R", .id = SH_CPU_SH7751R, .pvr = 0x04050005, .prr = 0x00000113, .cvr = 0x00110000, /* Neutered caches, should be 0x20480000 */ + .features = SH_FEATURE_BCR3_AND_BCR4, }, { .name = "SH7785", .id = SH_CPU_SH7785, -- cgit v1.1