From 93fcfe39a0383377e647b821c9f165fd927cd4e0 Mon Sep 17 00:00:00 2001 From: aliguori Date: Thu, 15 Jan 2009 22:34:14 +0000 Subject: Convert references to logfile/loglevel to use qemu_log*() macros This is a large patch that changes all occurrences of logfile/loglevel global variables to use the new qemu_log*() macros. Signed-off-by: Eduardo Habkost Signed-off-by: Anthony Liguori git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6338 c046a42c-6fe2-441c-8c8c-71466251a162 --- target-mips/helper.c | 39 +++++++++++------------------ target-mips/op_helper.c | 66 ++++++++++++++++++++++++------------------------- target-mips/translate.c | 39 +++++++++++------------------ 3 files changed, 61 insertions(+), 83 deletions(-) (limited to 'target-mips') diff --git a/target-mips/helper.c b/target-mips/helper.c index 344d431..35b2c59 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -117,10 +117,7 @@ static int get_physical_address (CPUState *env, target_ulong *physical, int ret = TLBRET_MATCH; #if 0 - if (logfile) { - fprintf(logfile, "user mode %d h %08x\n", - user_mode, env->hflags); - } + qemu_log("user mode %d h %08x\n", user_mode, env->hflags); #endif if (address <= (int32_t)0x7FFFFFFFUL) { @@ -198,9 +195,8 @@ static int get_physical_address (CPUState *env, target_ulong *physical, } } #if 0 - if (logfile) { - fprintf(logfile, TARGET_FMT_lx " %d %d => " TARGET_FMT_lx " %d (%d)\n", - address, rw, access_type, *physical, *prot, ret); + qemu_log(TARGET_FMT_lx " %d %d => " TARGET_FMT_lx " %d (%d)\n", + address, rw, access_type, *physical, *prot, ret); } #endif @@ -233,13 +229,11 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, int access_type; int ret = 0; - if (logfile) { #if 0 - cpu_dump_state(env, logfile, fprintf, 0); + log_cpu_state(env, 0); #endif - fprintf(logfile, "%s pc " TARGET_FMT_lx " ad " TARGET_FMT_lx " rw %d mmu_idx %d smmu %d\n", - __func__, env->active_tc.PC, address, rw, mmu_idx, is_softmmu); - } + qemu_log("%s pc " TARGET_FMT_lx " ad " TARGET_FMT_lx " rw %d mmu_idx %d smmu %d\n", + __func__, env->active_tc.PC, address, rw, mmu_idx, is_softmmu); rw &= 1; @@ -252,10 +246,8 @@ int cpu_mips_handle_mmu_fault (CPUState *env, target_ulong address, int rw, #else ret = get_physical_address(env, &physical, &prot, address, rw, access_type); - if (logfile) { - fprintf(logfile, "%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_lx " prot %d\n", - __func__, address, ret, physical, prot); - } + qemu_log("%s address=" TARGET_FMT_lx " ret %d physical " TARGET_FMT_lx " prot %d\n", + __func__, address, ret, physical, prot); if (ret == TLBRET_MATCH) { ret = tlb_set_page(env, address & TARGET_PAGE_MASK, physical & TARGET_PAGE_MASK, prot, @@ -357,14 +349,14 @@ void do_interrupt (CPUState *env) int cause = -1; const char *name; - if (logfile && env->exception_index != EXCP_EXT_INTERRUPT) { + if (qemu_log_enabled() && env->exception_index != EXCP_EXT_INTERRUPT) { if (env->exception_index < 0 || env->exception_index > EXCP_LAST) name = "unknown"; else name = excp_names[env->exception_index]; - fprintf(logfile, "%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " %s exception\n", - __func__, env->active_tc.PC, env->CP0_EPC, name); + qemu_log("%s enter: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " %s exception\n", + __func__, env->active_tc.PC, env->CP0_EPC, name); } if (env->exception_index == EXCP_EXT_INTERRUPT && (env->hflags & MIPS_HFLAG_DM)) @@ -558,15 +550,12 @@ void do_interrupt (CPUState *env) env->CP0_Cause = (env->CP0_Cause & ~(0x1f << CP0Ca_EC)) | (cause << CP0Ca_EC); break; default: - if (logfile) { - fprintf(logfile, "Invalid MIPS exception %d. Exiting\n", - env->exception_index); - } + qemu_log("Invalid MIPS exception %d. Exiting\n", env->exception_index); printf("Invalid MIPS exception %d. Exiting\n", env->exception_index); exit(1); } - if (logfile && env->exception_index != EXCP_EXT_INTERRUPT) { - fprintf(logfile, "%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n" + if (qemu_log_enabled() && env->exception_index != EXCP_EXT_INTERRUPT) { + qemu_log("%s: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx " cause %d\n" " S %08x C %08x A " TARGET_FMT_lx " D " TARGET_FMT_lx "\n", __func__, env->active_tc.PC, env->CP0_EPC, cause, env->CP0_Status, env->CP0_Cause, env->CP0_BadVAddr, diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index f09d8fe..6b0600a 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -29,8 +29,8 @@ void do_raise_exception_err (uint32_t exception, int error_code) { #if 1 - if (logfile && exception < 0x100) - fprintf(logfile, "%s: %d %d\n", __func__, exception, error_code); + if (exception < 0x100) + qemu_log("%s: %d %d\n", __func__, exception, error_code); #endif env->exception_index = exception; env->error_code = error_code; @@ -1342,21 +1342,21 @@ void do_mtc0_datahi (target_ulong t0) void do_mtc0_status_debug(uint32_t old, uint32_t val) { - fprintf(logfile, "Status %08x (%08x) => %08x (%08x) Cause %08x", + qemu_log("Status %08x (%08x) => %08x (%08x) Cause %08x", old, old & env->CP0_Cause & CP0Ca_IP_mask, val, val & env->CP0_Cause & CP0Ca_IP_mask, env->CP0_Cause); switch (env->hflags & MIPS_HFLAG_KSU) { - case MIPS_HFLAG_UM: fputs(", UM\n", logfile); break; - case MIPS_HFLAG_SM: fputs(", SM\n", logfile); break; - case MIPS_HFLAG_KM: fputs("\n", logfile); break; + case MIPS_HFLAG_UM: qemu_log(", UM\n"); break; + case MIPS_HFLAG_SM: qemu_log(", SM\n"); break; + case MIPS_HFLAG_KM: qemu_log("\n"); break; default: cpu_abort(env, "Invalid MMU mode!\n"); break; } } void do_mtc0_status_irqraise_debug(void) { - fprintf(logfile, "Raise pending IRQs\n"); + qemu_log("Raise pending IRQs\n"); } /* MIPS MT functions */ @@ -1705,35 +1705,38 @@ target_ulong do_ei (void) static void debug_pre_eret (void) { - fprintf(logfile, "ERET: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx, - env->active_tc.PC, env->CP0_EPC); - if (env->CP0_Status & (1 << CP0St_ERL)) - fprintf(logfile, " ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC); - if (env->hflags & MIPS_HFLAG_DM) - fprintf(logfile, " DEPC " TARGET_FMT_lx, env->CP0_DEPC); - fputs("\n", logfile); + if (loglevel & CPU_LOG_EXEC) { + qemu_log("ERET: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx, + env->active_tc.PC, env->CP0_EPC); + if (env->CP0_Status & (1 << CP0St_ERL)) + qemu_log(" ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC); + if (env->hflags & MIPS_HFLAG_DM) + qemu_log(" DEPC " TARGET_FMT_lx, env->CP0_DEPC); + qemu_log("\n"); + } } static void debug_post_eret (void) { - fprintf(logfile, " => PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx, - env->active_tc.PC, env->CP0_EPC); - if (env->CP0_Status & (1 << CP0St_ERL)) - fprintf(logfile, " ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC); - if (env->hflags & MIPS_HFLAG_DM) - fprintf(logfile, " DEPC " TARGET_FMT_lx, env->CP0_DEPC); - switch (env->hflags & MIPS_HFLAG_KSU) { - case MIPS_HFLAG_UM: fputs(", UM\n", logfile); break; - case MIPS_HFLAG_SM: fputs(", SM\n", logfile); break; - case MIPS_HFLAG_KM: fputs("\n", logfile); break; - default: cpu_abort(env, "Invalid MMU mode!\n"); break; + if (loglevel & CPU_LOG_EXEC) { + qemu_log(" => PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx, + env->active_tc.PC, env->CP0_EPC); + if (env->CP0_Status & (1 << CP0St_ERL)) + qemu_log(" ErrorEPC " TARGET_FMT_lx, env->CP0_ErrorEPC); + if (env->hflags & MIPS_HFLAG_DM) + qemu_log(" DEPC " TARGET_FMT_lx, env->CP0_DEPC); + switch (env->hflags & MIPS_HFLAG_KSU) { + case MIPS_HFLAG_UM: qemu_log(", UM\n"); break; + case MIPS_HFLAG_SM: qemu_log(", SM\n"); break; + case MIPS_HFLAG_KM: qemu_log("\n"); break; + default: cpu_abort(env, "Invalid MMU mode!\n"); break; + } } } void do_eret (void) { - if (loglevel & CPU_LOG_EXEC) - debug_pre_eret(); + debug_pre_eret(); if (env->CP0_Status & (1 << CP0St_ERL)) { env->active_tc.PC = env->CP0_ErrorEPC; env->CP0_Status &= ~(1 << CP0St_ERL); @@ -1742,20 +1745,17 @@ void do_eret (void) env->CP0_Status &= ~(1 << CP0St_EXL); } compute_hflags(env); - if (loglevel & CPU_LOG_EXEC) - debug_post_eret(); + debug_post_eret(); env->CP0_LLAddr = 1; } void do_deret (void) { - if (loglevel & CPU_LOG_EXEC) - debug_pre_eret(); + debug_pre_eret(); env->active_tc.PC = env->CP0_DEPC; env->hflags &= MIPS_HFLAG_DM; compute_hflags(env); - if (loglevel & CPU_LOG_EXEC) - debug_post_eret(); + debug_post_eret(); env->CP0_LLAddr = 1; } #endif /* !CONFIG_USER_ONLY */ diff --git a/target-mips/translate.c b/target-mips/translate.c index 59f9fd8..a3bbd74 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -514,18 +514,11 @@ static const char *fregnames_h[] = "h24", "h25", "h26", "h27", "h28", "h29", "h30", "h31", }; #ifdef MIPS_DEBUG_DISAS -#define MIPS_DEBUG(fmt, args...) \ -do { \ - if (loglevel & CPU_LOG_TB_IN_ASM) { \ - fprintf(logfile, TARGET_FMT_lx ": %08x " fmt "\n", \ - ctx->pc, ctx->opcode , ##args); \ - } \ -} while (0) -#define LOG_DISAS(...) \ - do { \ - if (loglevel & CPU_LOG_TB_IN_ASM) \ - fprintf(logfile, ## __VA_ARGS__); \ - } while (0) +#define MIPS_DEBUG(fmt, args...) \ + qemu_log_mask(CPU_LOG_TB_IN_ASM, \ + TARGET_FMT_lx ": %08x " fmt "\n", \ + ctx->pc, ctx->opcode , ##args) +#define LOG_DISAS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__) #else #define MIPS_DEBUG(fmt, args...) do { } while(0) #define LOG_DISAS(...) do { } while (0) @@ -8180,8 +8173,8 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb, int num_insns; int max_insns; - if (search_pc && loglevel) - fprintf (logfile, "search pc %d\n", search_pc); + if (search_pc) + qemu_log("search pc %d\n", search_pc); pc_start = tb->pc; /* Leave some spare opc slots for branch handling. */ @@ -8203,11 +8196,9 @@ gen_intermediate_code_internal (CPUState *env, TranslationBlock *tb, if (max_insns == 0) max_insns = CF_COUNT_MASK; #ifdef DEBUG_DISAS - if (loglevel & CPU_LOG_TB_CPU) { - fprintf(logfile, "------------------------------------------------\n"); - /* FIXME: This may print out stale hflags from env... */ - cpu_dump_state(env, logfile, fprintf, 0); - } + qemu_log_mask(CPU_LOG_TB_CPU, "------------------------------------------------\n"); + /* FIXME: This may print out stale hflags from env... */ + log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0); #endif LOG_DISAS("\ntb %p idx %d hflags %04x\n", tb, ctx.mem_idx, ctx.hflags); gen_icount_start(); @@ -8299,13 +8290,11 @@ done_generating: #ifdef DEBUG_DISAS LOG_DISAS("\n"); if (loglevel & CPU_LOG_TB_IN_ASM) { - fprintf(logfile, "IN: %s\n", lookup_symbol(pc_start)); - target_disas(logfile, pc_start, ctx.pc - pc_start, 0); - fprintf(logfile, "\n"); - } - if (loglevel & CPU_LOG_TB_CPU) { - fprintf(logfile, "---------------- %d %08x\n", ctx.bstate, ctx.hflags); + qemu_log("IN: %s\n", lookup_symbol(pc_start)); + log_target_disas(pc_start, ctx.pc - pc_start, 0); + qemu_log("\n"); } + qemu_log_mask(CPU_LOG_TB_CPU, "---------------- %d %08x\n", ctx.bstate, ctx.hflags); #endif } -- cgit v1.1