From 34f5606ee101f82a247d09d05644ad2a63c8e342 Mon Sep 17 00:00:00 2001 From: Petar Jovanovic Date: Mon, 26 Nov 2012 16:13:21 +0100 Subject: target-mips: Fix incorrect code and test for INSV Content of register rs should be shifted for pos before applying a mask. This change contains both fix for the instruction and to the existing test. Signed-off-by: Petar Jovanovic Reviewed-by: Eric Johnson Signed-off-by: Aurelien Jarno --- target-mips/dsp_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) (limited to 'target-mips') diff --git a/target-mips/dsp_helper.c b/target-mips/dsp_helper.c index e7949c2..fda5f04 100644 --- a/target-mips/dsp_helper.c +++ b/target-mips/dsp_helper.c @@ -3152,7 +3152,7 @@ target_ulong helper_##name(CPUMIPSState *env, target_ulong rs, \ \ filter = ((int32_t)0x01 << size) - 1; \ filter = filter << pos; \ - temprs = rs & filter; \ + temprs = (rs << pos) & filter; \ temprt = rt & ~filter; \ temp = temprs | temprt; \ \ -- cgit v1.1