From 2a6e32dd46967124f12c29eece7aa7fc3f0ee063 Mon Sep 17 00:00:00 2001 From: Aurelien Jarno Date: Sun, 22 Nov 2009 13:22:54 +0100 Subject: target-mips: make CP0_LLAddr register CPU dependent MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Depending on the CPU, CP0_LLAddr is either read-only or read-write, and the returned value can be shifted by a variable amount of bits. Signed-off-by: Aurelien Jarno Signed-off-by: Hervé Poussineau --- target-mips/op_helper.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) (limited to 'target-mips/op_helper.c') diff --git a/target-mips/op_helper.c b/target-mips/op_helper.c index d2a81f0..52d687d 100644 --- a/target-mips/op_helper.c +++ b/target-mips/op_helper.c @@ -730,7 +730,7 @@ target_ulong helper_mftc0_status(void) target_ulong helper_mfc0_lladdr (void) { - return (int32_t)env->lladdr >> 4; + return (int32_t)(env->lladdr >> env->CP0_LLAddr_shift); } target_ulong helper_mfc0_watchlo (uint32_t sel) @@ -795,7 +795,7 @@ target_ulong helper_dmfc0_tcschefback (void) target_ulong helper_dmfc0_lladdr (void) { - return env->lladdr >> 4; + return env->lladdr >> env->CP0_LLAddr_shift; } target_ulong helper_dmfc0_watchlo (uint32_t sel) @@ -1243,6 +1243,13 @@ void helper_mtc0_config2 (target_ulong arg1) env->CP0_Config2 = (env->CP0_Config2 & 0x8FFF0FFF); } +void helper_mtc0_lladdr (target_ulong arg1) +{ + target_long mask = env->CP0_LLAddr_rw_bitmask; + arg1 = arg1 << env->CP0_LLAddr_shift; + env->lladdr = (env->lladdr & ~mask) | (arg1 & mask); +} + void helper_mtc0_watchlo (target_ulong arg1, uint32_t sel) { /* Watch exceptions for instructions, data loads, data stores -- cgit v1.1